DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 29

• Manufacturer Part Number: DSPIC33FJ12GP202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SSOP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

8.4
Quadrature encoders (also referred to as incremental
encoders or optical encoders) are used in position and
speed
Quadrature encoders enable closed-loop control of
many motor control applications, such as Switched
Reluctance (SR) Motor and AC Induction Motor
(ACIM).
Typically, three outputs termed, Phase A, Phase B and
INDEX, provide information that can be decoded to
provide information on the movement of the motor
shaft, including distance and direction.
A quadrature decoder captures the phase signals and
index pulse and converts the information into a numeric
count of the position pulses. Generally, the count will
FIGURE 8-3:
© 2005 Microchip Technology Inc.
UPDN
INDX
QEA
QEB
detection
Quadrature Encoder Interface
(QEI) Module
Synchronize
Sleep Input
Det
PCDOUT
of
UPDN_SRC
Programmable
Programmable
0
1
QUADRATURE ENCODER INTERFACE BLOCK DIAGRAM
Programmable
1
0
Digital Filter
Digital Filter
Digital Filter
QEICON<11>
rotating
Existing Pin Logic
Up/Down
3
motion
T
QEIM<2:0>
CY
Interface Logic
Quadrature
TQCS
Encoder
0
1
Mode Select
systems.
QEIM<2:0>
Preliminary
3
TQGATE
1
0
2
increment when the shaft is rotating one direction and
decrement when the shaft is rotating in the other
direction.
The QEI module (Figure 8-3) includes:
• Three input pins for two phase signals and index
• Programmable digital noise filters on inputs
• Quadrature decoder providing counter pulses and
• 16-bit up/down position counter
• Count direction status
• x2 and x4 count resolution
• Two modes of Position Counter Reset
• General Purpose16-Bit Timer/Counter mode
• Interrupts generated by QEI or counter events
pulse
count direction
16-Bit Up/Down Counter
Max Count Register
D
CK
Comparator/
Zero Detect
(POSCNT)
(MAXCNT)
TQCKPS<1:0>
Q
Q
1, 8, 64, 256
Prescaler
2
Reset
Equal
dsPIC33F
DS70155C-page 27
QEIIF
Event
Flag