PIC18F14K22-I/SS Microchip Technology, PIC18F14K22-I/SS Datasheet - Page 303

IC PIC MCU FLASH 512KX16 20-SSOP

PIC18F14K22-I/SS

Manufacturer Part Number
PIC18F14K22-I/SS
Description
IC PIC MCU FLASH 512KX16 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F14K22-I/SS

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC18
No. Of I/o's
18
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
64MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, MSSP, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
A/d Bit Size
10 bit
A/d Channels Available
12
Height
1.75 mm
Length
7.2 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V, 2.7 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F14K22-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
PIC18F14K22-I/SS
Quantity:
10 000
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
After Instruction
Decode
W
Q1
=
Move literal to W
MOVLW k
0  k  255
k  W
None
The eight-bit literal ‘k’ is loaded into W.
1
1
MOVLW
literal ‘k’
Read
0000
Q2
5Ah
1110
5Ah
Process
Data
Q3
kkkk
Write to W
Q4
kkkk
Preliminary
PIC18F1XK22/LF1XK22
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
REG
W
REG
Q1
=
=
=
=
register ‘f’
Move W to f
MOVWF
0  f  255
a  [0,1]
(W)  f
None
Move data from W to register ‘f’.
Location ‘f’ can be anywhere in the
256-byte bank.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See
Section 23.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
MOVWF
Read
0110
Q2
4Fh
FFh
4Fh
4Fh
REG, 0
f {,a}
111a
Process
Data
Q3
DS41365D-page 303
ffff
register ‘f’
Write
Q4
ffff

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