PIC18F25K20-I/ML Microchip Technology, PIC18F25K20-I/ML Datasheet - Page 22
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PIC18F25K20-I/ML
Manufacturer Part Number
PIC18F25K20-I/ML
Description
IC PIC MCU FLASH 16KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
5.PIC18F26K20-EML.pdf
(430 pages)
Specifications of PIC18F25K20-I/ML
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
64MHz
No. Of Timers
4
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F25K20-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2XK20/4XK20
3.4
The ID locations are programmed much like the code
memory. The ID registers are mapped in addresses
200000h through 200007h. These locations read out
normally even after code protection.
Table 3-8 demonstrates the code sequence required to
write the ID locations.
TABLE 3-8:
DS41297F-page 22
Step 1: Direct access to code memory.
0000
0000
0000
Step 2: Set Table Pointer to ID. Load write buffer with 8 bytes and write.
0000
0000
0000
0000
0000
0000
1101
1101
1101
1111
0000
Note:
Command
4-bit
ID Location Programming
The user only needs to fill the first 8 bytes
of the write buffer in order to write the ID
locations.
WRITE ID SEQUENCE
<MSB><LSB>
<MSB><LSB>
<MSB><LSB>
<MSB><LSB>
Data Payload
8E A6
9C A6
84 A6
0E 20
6E F8
0E 00
6E F7
0E 00
6E F6
00 00
BSF EECON1, EEPGD
BCF EECON1, CFGS
BSF EECON1, WREN
MOVLW 20h
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 00h
MOVWF TBLPTRL
Write 2 bytes and post-increment address by 2.
Write 2 bytes and post-increment address by 2.
Write 2 bytes and post-increment address by 2.
Write 2 bytes and start programming.
NOP - hold PGC high for time P9 and low for time P10.
Advance Information
In order to modify the ID locations, refer to the method-
ology described in Section 3.2.1 “Modifying Code
Memory”. As with code memory, the ID locations must
be erased before being modified.
When V
operation, ID locations can be cleared with the Row
Erase method described in Section 3.1.3 “ICSP Row
Erase”.
Core Instruction
DD
is below the minimum for Bulk Erase
© 2009 Microchip Technology Inc.