ATTINY261-15MAZ Atmel, ATTINY261-15MAZ Datasheet

no-image

ATTINY261-15MAZ

Manufacturer Part Number
ATTINY261-15MAZ
Description
MCU AVR 2KB FLASH 15MHZ 32-VQFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY261-15MAZ

Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
16
Eeprom Size
128 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
2KB (2K x 8)
Data Converters
A/D 11x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY261-15MAZ
Manufacturer:
TI
Quantity:
15
Features
High Performance, Low Power AVR
Advanced RISC Architecture
Non-volatile Program and Data Memories
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltage:
Speed Grade:
Industrial Temperature Range
Low Power Consumption
– 123 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– 2/4/8K Byte of In-System Programmable Program Memory Flash
– 128/256/512 Bytes In-System Programmable EEPROM (ATtiny261/461/861)
– 128/256/512 Bytes Internal SRAM (ATtiny261/461/861)
– Programming Lock for Self-Programming Flash Program and EEPROM Data
– 8/16-bit Timer/Counter with Prescaler and Two PWM Channels
– 8/10-bit High Speed Timer/Counter with Separate Prescaler
– Universal Serial Interface with Start Condition Detector
– 10-bit ADC
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– debugWIRE On-chip Debug System
– In-System Programmable via SPI Port
– External and Internal Interrupt Sources
– Low Power Idle, ADC Noise Reduction, and Power-down Modes
– Enhanced Power-on Reset Circuit
– Programmable Brown-out Detection Circuit
– Internal Calibrated Oscillator
– 16 Programmable I/O Lines
– 20-pin PDIP, 20-pin SOIC and 32-pad MLF
– 1.8 - 5.5V for ATtiny261V/461V/861V
– 2.7 - 5.5V for ATtiny261/461/861
– ATtiny261V/461V/861V: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 10 MHz @ 2.7 - 5.5V
– ATtiny261/461/861: 0 - 10 MHz @ 2.7 - 5.5V, 0 - 20 MHz @ 4.5 - 5.5V
– Active Mode: 1 MHz, 1.8V: 380μA
– Power-down Mode: 0.1μA at 1.8V
(ATtiny261/461/861)
Security
Endurance: 10,000 Write/Erase Cycles
Endurance: 100,000 Write/Erase Cycles
3 High Frequency PWM Outputs with Separate Output Compare Registers
Programmable Dead Time Generator
11 Single Ended Channels
16 Differential ADC Channel Pairs
15 Differential ADC Channel Pairs with Programmable Gain (1x, 8x, 20x, 32x)
®
8-Bit Microcontroller
8-bit
Microcontroller
with 2/4/8K
Bytes In-System
Programmable
Flash
ATtiny261/V
ATtiny461/V
ATtiny861/V
Preliminary
Summary
2588BS–AVR–11/06

Related parts for ATTINY261-15MAZ

ATTINY261-15MAZ Summary of contents

Page 1

... Operating Voltage: – 1.8 - 5.5V for ATtiny261V/461V/861V – 2.7 - 5.5V for ATtiny261/461/861 • Speed Grade: – ATtiny261V/461V/861V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATtiny261/461/861 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Industrial Temperature Range • Low Power Consumption – Active Mode: 1 MHz, 1.8V: 380μA – ...

Page 2

... Pin Configurations Figure 1-1. Pinout ATtiny261/461/861 (MOSI/DI/SDA/OC1A/PCINT8) PB0 (MISO/DO/OC1A/PCINT9) PB1 (SCK/USCK/SCL/OC1B/PCINT10) PB2 (ADC7/OC1D/CLKI/XTAL1/PCINT12) PB4 (ADC8/OC1D/CLKO/XTAL2/PCINT13) PB5 (ADC9/INT0/T0/PCINT14) PB6 (ADC10/RESET/PCINT15) PB7 (OC1B/PCINT11) PB3 (ADC7/OC1D/CLKI/XTAL1/PCINT12) PB4 (ADC8/OC1D/CLKO/XTAL2/PCINT13) PB5 Note: The large center pad underneath the QFN/MLF package should be soldered to ground on the board to ensure good mechanical stability ...

Page 3

... Overview The ATtiny261/461/861 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny261/461/861 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1. 2588BS– ...

Page 4

... As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATtiny261/461/861 as listed on page ...

Page 5

... As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATtiny261/461/861 as listed on page 2 ...

Page 6

... Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. ATtiny261/461/861 6 2588BS–AVR–11/06 ...

Page 7

... ADIF ADIE ADC Data Register High Byte ADC Data Register Low Byte GSEL REFS2 MUX5 ADC9D ADC8D ADC7D ADC5D ADC4D ADC3D AREFD - OC1OE5 OC1OE4 OC1OE3 ATtiny261/461/861 Bit 2 Bit 1 Bit SP10 SP9 SP8 SP2 SP1 SP0 – – – – – – ...

Page 8

... Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. ATtiny261/461/861 8 2588BS–AVR–11/06 ...

Page 9

... PC ← then PC ← then PC ← then PC ← then PC ← then PC ← I/O(P,b) ← 1 I/O(P,b) ← 0 Rd(n+1) ← Rd(n), Rd(0) ← 0 Rd(n) ← Rd(n+1), Rd(7) ← 0 Rd(0)←C,Rd(n+1)← Rd(n),C←Rd(7) ATtiny261/461/861 Operation Flags #Clocks Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H ...

Page 10

... Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break ATtiny261/461/861 10 Description Rd(7)←C,Rd(n)← Rd(n+1),C←Rd(0) Rd(n) ← Rd(n+1), n=0..6 Rd(3..0)←Rd(7..4),Rd(7..4)←Rd(3..0) SREG(s) ← 1 SREG(s) ← ← Rr(b) Rd(b) ← ← ← ← ...

Page 11

... Wide, Plastic Dual Inline Package (PDIP) 20S2 20-lead, 0.300" Wide, Plastic Gull Wing Small Outline Package (SOIC) 2588BS–AVR–11/06 (2) Ordering Code Package ATtiny261V-10MU ATtiny261V-10PU ATtiny261V-10SU ATtiny261-20MU ATtiny261-20PU ATtiny261-20SU Package Type ATtiny261/461/861 (1) Operational Range 32M1-A Industrial 20P3 (-40°C to 85°C) 20S2 ...

Page 12

... Figure 23.3 on page 187 CC 32M1-A 32-pad 1.0 mm Body, Lead Pitch 0.50 mm, Micro Lead Frame Package (MLF) 20P3 20-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 20S2 20-lead, 0.300" Wide, Plastic Gull Wing Small Outline Package (SOIC) ATtiny261/461/861 12 (2) Ordering Code Package ATtiny461V-10MU ATtiny461V-10PU ATtiny461V-10SU ...

Page 13

... Wide, Plastic Gull Wing Small Outline Package (SOIC) 2588BS–AVR–11/06 (2) Ordering Code Package ATtiny861V-10MU ATtiny861V-10PU ATtiny861V-10SU ATtiny861-20MU ATtiny861-20PU ATtiny861-20SU Package Type ATtiny261/461/861 (1) Operational Range 32M1-A Industrial 20P3 (-40°C to 85°C) 20S2 32M1-A Industrial 20P3 (-40°C to 85°C) 20S2 ...

Page 14

... Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 R ATtiny261/461/861 TITLE 32M1-A, 32-pad 1.0 mm Body, Lead Pitch 0.50 mm, 3.10 mm Exposed Pad, Micro Lead Frame Package (MLF) SIDE VIEW ...

Page 15

... Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 2588BS–AVR–11/06 D PIN TITLE 20P3, 20-lead (0.300"/7.62 mm Wide) Plastic Dual Inline Package (PDIP) ATtiny261/461/861 E1 A1 COMMON DIMENSIONS (Unit of Measure = mm) MIN SYMBOL NOM A – – A1 0.381 – D 25.493 – ...

Page 16

... ATtiny261/461/861 16 2588BS–AVR–11/06 ...

Page 17

... Errata 8.1 Errata ATtiny261 The revision letter in this section refers to the revision of the ATtiny261 device. 8.1.1 Rev A No known errata. 8.2 Errata ATtiny461 The revision letter in this section refers to the revision of the ATtiny461 device. 8.2.1 Rev B Yield improvement. No known errata. 8.2.2 Rev A No known errata ...

Page 18

... Datasheet Revision History 9.1 Rev. 2588A – 11/ 9.2 Rev. 2588A – 10/06 1. ATtiny261/461/861 18 Updated ”Ordering Information” on page Updated ”Packaging Information” on page Initial Revision. 222. 225. 2588BS–AVR–11/06 ...

Page 19

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Related keywords