PIC18F66J11T-I/PT Microchip Technology, PIC18F66J11T-I/PT Datasheet - Page 2

• Manufacturer Part Number: PIC18F66J11T-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J11T-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 3930Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F66J11T-I/PTTR

PIC18F87J11 FAMILY
3. Module: Low-Voltage Detect
4. Module: Oscillator Configurations (PLL)
DS80305B-page 2
The
implemented in this revision of silicon.
Work around
None.
Date Codes that pertain to this issue:
All engineering and production devices.
When Phase Lock Loop (PLL) is enabled, if the
PLL input frequency is higher than 8 MHz, there
may be problems accessing the RAM.
Work around
Limit the PLL input frequency from 4 MHz to
8 MHz. This will cause the system clock to operate
from 16 MHz to 32 MHz.
If it is necessary to run the device above 32 MHz,
do not enable PLL and use the EC mode.
Date Codes that pertain to this issue:
All engineering and production devices.
LVDSTAT
bit
(WDTCON<6>)
is
not
REVISION HISTORY
Rev A Document (2/2007)
First revision of this document. Silicon issue 1 (Voltage
Regulator), 2 (SRAM) and 3 (Low-Voltage Detect).
Rev B Document (9/2007)
Added silicon issue 4 (Oscillator Configurations – PLL).
© 2007 Microchip Technology Inc.