ATMEGA168P-20MU Atmel, ATMEGA168P-20MU Datasheet - Page 208
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ATMEGA168P-20MU
Manufacturer Part Number
ATMEGA168P-20MU
Description
MCU AVR 16K FLASH 20MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA168P-20MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA168P-20MU
Manufacturer:
ATMEL
Quantity:
12 000
Part Number:
ATMEGA168P-20MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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20.7
8025L–AVR–7/10
AVR USART MSPIM vs. AVR SPI
The USART in MSPIM mode is fully compatible with the AVR SPI regarding:
• Master mode timing diagram.
• The UCPOLn bit functionality is identical to the SPI CPOL bit.
• The UCPHAn bit functionality is identical to the SPI CPHA bit.
• The UDORDn bit functionality is identical to the SPI DORD bit.
However, since the USART in MSPIM mode reuses the USART resources, the use of the
USART in MSPIM mode is somewhat different compared to the SPI. In addition to differences of
the control register bits, and that only master operation is supported by the USART in MSPIM
mode, the following features differ between the two modules:
• The USART in MSPIM mode includes (double) buffering of the transmitter. The SPI has no
• The USART in MSPIM mode receiver includes an additional buffer level.
• The SPI WCOL (Write Collision) bit is not included in USART in MSPIM mode.
• The SPI double speed mode (SPI2X) bit is not included. However, the same effect is achieved
• Interrupt timing is not compatible.
• Pin control differs due to the master only operation of the USART in MSPIM mode.
A comparison of the USART in MSPIM mode and the SPI pins is shown in
208.
Table 20-3.
buffer.
by setting UBRRn accordingly.
USART_MSPIM
XCKn
RxDn
TxDn
(N/A)
Comparison of USART in MSPIM mode and SPI pins.
MOSI
MISO
SCK
SPI
SS
ATmega48P/88P/168P
MSPIM
Comment
Master Out only
Master In only
(Functionally identical)
Not supported by USART in
Table 20-3 on page
208
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