PIC16LC771-I/SS Microchip Technology, PIC16LC771-I/SS Datasheet - Page 95

• Manufacturer Part Number: PIC16LC771-I/SS
• Description: IC MCU OTP 4KX14 A/D PWM 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC771-I/SS

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Controller Family/series: PIC16LC
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• Core: PIC
• Processor Series: PIC16LC
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 256 B
• Data Rom Size: 256 B
• On-chip Adc: 6
• Number Of Programmable I/os: 16
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Mounting Style: SMD/SMT
• Height: 1.75 mm
• Interface Type: I2C, SPI, SSP
• Length: 7.2 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Width: 5.3 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16LC771I/SS

9.2.16
Clock arbitration occurs when the master, during any
receive, transmit or repeated START/STOP condition,
de-asserts the SCL pin (SCL allowed to float high).
When the SCL pin is allowed to float high, the baud rate
generator (BRG) is suspended from counting until the
FIGURE 9-22:
BRG overflow,
Release SCL,
If SCL = 1 Load BRG with
SSPADD<6:0>, and start count
to measure high time interval
2002 Microchip Technology Inc.
SCL
SDA
CLOCK ARBITRATION
CLOCK ARBITRATION TIMING IN MASTER TRANSMIT MODE
T
BRG
BRG overflow occurs,
Release SCL, Slave device holds SCL low.
T
BRG
Advance Information
SCL line sampled once every machine cycle (Tosc
Hold off BRG until SCL is sampled high.
SCL pin is actually sampled high. When the SCL pin is
sampled high, the baud rate generator is reloaded with
the contents of SSPADD<6:0> and begins counting.
This ensures that the SCL high time will always be at
least one BRG rollover count in the event that the clock
is held low by an external device (Figure 9-22).
PIC16C717/770/771
T
BRG
SCL = 1 BRG starts counting
clock high interval.
DS41120B-page 93
4).