PIC18F25K22-I/SO Microchip Technology, PIC18F25K22-I/SO Datasheet - Page 447

• Manufacturer Part Number: PIC18F25K22-I/SO
• Description: MCU 8BIT 32KB FLASH 5.5V 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F25K22-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 19x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164005
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 27-10: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
FIGURE 27-9:
 2010 Microchip Technology Inc.
30
31
32
33
34
35
36
37
38
39
Param.
No.
Note:
T1OSO/T13CKI
TmcL
T
T
T
T
T
T
T
T
T
Symbol
OST
CSD
WDT
PWRT
IOZ
BOR
IVRST
HLVD
IOBST
TMR0 or
Refer to
T0CKI
TMR1
AND BROWN-OUT RESET REQUIREMENTS
MCLR Pulse Width (low)
Watchdog Timer Time-out Period
(no postscaler)
Oscillation Start-up Timer Period
Power-up Timer Period
I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
Brown-out Reset Pulse Width
Internal Reference Voltage Stable
High/Low-Voltage Detect Pulse
Width
CPU Start-up Time
Time for HF-INTOSC to Stabilize
TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS
Figure 27-4
Characteristic
for load conditions.
40
45
Preliminary
42
47
1024
T
54.8
Min
200
200
3.5
OSC
—
—
—
2
5
PIC18(L)F2X/4XK22
64.4
0.25
41
Typ
46
4.1
25
—
—
—
—
—
2
1024 T
Max
74.1
4.7
35
10
—
—
—
—
1
OSC
Units
ms
ms
ms
48
s
—
s
s
s
s
s
1:1 prescaler
T
V
D005)
V
OSC
DD
DD
DS41412D-page 447
Conditions
 B
 V
= OSC1 period
VDD
HLVD
(see