PIC18LF25K22-I/SO Microchip Technology, PIC18LF25K22-I/SO Datasheet - Page 61
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PIC18LF25K22-I/SO
Manufacturer Part Number
PIC18LF25K22-I/SO
Description
MCU 8BIT 32KB FLASH 3.6V 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF25K22-I/SO
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1536Byte
Cpu Speed
64MHz
No. Of Timers
7
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
7
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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4.2
The MCLR pin provides a method for triggering an
external Reset of the device. A Reset is generated by
holding the pin low. These devices have a noise filter in
the MCLR Reset path which detects and ignores small
pulses. An internal weak pull-up is enabled when the
pin is configured as the MCLR input.
The MCLR pin is not driven low by any internal Resets,
including the WDT.
In PIC18(L)F2X/4XK22 devices, the MCLR input can
be disabled with the MCLRE Configuration bit. When
MCLR is disabled, the pin becomes a digital input. See
Section 10.6
information.
4.3
A Power-on Reset pulse is generated on-chip
whenever V
allows the device to start in the initialized state when
V
To take advantage of the POR circuitry either leave the
pin floating, or tie the MCLR pin through a resistor to
V
usually needed to create a Power-on Reset delay. A
minimum rise rate for V
time, see
When the device starts normal operation (i.e., exits the
Reset condition), device operating parameters (volt-
age, frequency, temperature, etc.) must be met to
ensure proper operation. If these conditions are not
met, the device must be held in Reset until the operat-
ing conditions are met.
POR events are captured by the POR bit of the RCON
register. The state of the bit is set to ‘0’ whenever a
POR occurs; it does not change for any other Reset
event. POR is not reset to ‘1’ by any hardware event.
To capture multiple events, the user must manually set
the bit to ‘1’ by software following any POR.
2010 Microchip Technology Inc.
DD
DD
. This will eliminate external RC components
is adequate for operation.
Master Clear (MCLR)
Power-on Reset (POR)
Figure
DD
rises above a certain threshold. This
“PORTE
4-2.
DD
is specified. For a slow rise
Registers”
for
more
Preliminary
FIGURE 4-2:
Note 1: External Power-on Reset circuit is required
PIC18(L)F2X/4XK22
V
2: 15 k < R < 40 k is recommended to make
3: R1 1 k will limit any current flowing into
DD
D
only if the V
The diode D helps discharge the capacitor
quickly when V
sure that the voltage drop across R does not
violate the device’s electrical specification.
MCLR from external capacitor C, in the event
of MCLR/V
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS).
V
DD
R
C
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
DD
PP
R1
DD
power-up slope is too slow.
pin breakdown, due to
powers down.
DD
MCLR
PIC
POWER-UP)
DS41412D-page 61
®
MCU
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