ATTINY461-15MZ Atmel, ATTINY461-15MZ Datasheet - Page 45

• Manufacturer Part Number: ATTINY461-15MZ
• Description: MCU AVR 4K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY461-15MZ

• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.3
9.3.1
9.3.2
9.4
9.4.1
7753F–AVR–01/11
Timed Sequences for Changing the Configuration of the Watchdog Timer
Register Description
Safety Level 1
Safety Level 2
MCUSR – MCU Status Register
Figure 9-7.
The sequence for changing configuration differs slightly between the two safety levels. Separate
procedures are described for each level.
In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the WDE bit
to one without any restriction. A timed sequence is needed when disabling an enabled Watch-
dog Timer. To disable an enabled Watchdog Timer, the following procedure must be followed:
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be written
2. Within the next four clock cycles, in the same operation, write the WDE and WDP bits as
In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read as one. A
timed sequence is needed when changing the Watchdog Time-out period. To change the
Watchdog Time-out, the following procedure must be followed:
1. In the same operation, write a logical one to WDCE and WDE. Even though the WDE
2. Within the next four clock cycles, in the same operation, write the WDP bits as desired,
The MCU Status Register provides information on which reset source caused an MCU Reset.
Bit
0x34 (0x54)
Read/Write
Initial Value
to WDE regardless of the previous value of the WDE bit.
desired, but with the WDCE bit cleared.
always is set, the WDE must be written to one to start the timed sequence.
but with the WDCE bit cleared. The value written to the WDE bit is irrelevant.
Watchdog Timer
7
–
R
0
6
–
R
0
WATCHDOG
OSCILLATOR
RESET
128 kHz
WDP0
WDP1
WDP2
WDP3
WDE
5
–
R
0
ATtiny261/ATtiny461/ATtiny861
4
–
R
0
3
WDRF
R/W
See Bit Description
MCU RESET
PRESCALER
WATCHDOG
2
BORF
R/W
1
EXTRF
R/W
0
PORF
R/W
MCUSR
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