PIC16C433-E/SO Microchip Technology, PIC16C433-E/SO Datasheet - Page 67
![IC MCU CMOS 8BIT 10MHZ 2K 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16C433-E/SO
Manufacturer Part Number
PIC16C433-E/SO
Description
IC MCU CMOS 8BIT 10MHZ 2K 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C433-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN (Local Interconnect Network)
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
For Use With
AC164030 - MODULE SKT PROMATEII 28DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
regardless of the state of the GIE bit. If the GIE bit is
clear (disabled), the device continues execution at the
instruction after the SLEEP instruction. If the GIE bit is
set (enabled), the device executes the instruction after
the SLEEP instruction and then branches to the inter-
rupt address (0004h). In cases where the execution of
the instruction following SLEEP is not desirable, the
user should have a NOP after the SLEEP instruction.
9.8.2
When global interrupts are disabled (GIE cleared) and
any interrupt source has both its interrupt enable bit
and interrupt flag bit set, one of the following will occur:
• If the interrupt occurs before the execution of a
• If the interrupt occurs during or after the execu-
FIGURE 9-17: WAKE-UP FROM SLEEP THROUGH INTERRUPT
2002 Microchip Technology Inc.
GPIF Flag
(INTCON<0>)
Note 1: XT, HS or LP Oscillator mode assumed.
GIE bit
(INTCON<7>)
INSTRUCTION FLOW
SLEEP instruction, the SLEEP instruction will com-
plete as a NOP. Therefore, the WDT and WDT
postscaler will not be cleared, the TO bit will not
be set and PD bits will not be cleared.
tion of a SLEEP instruction, the device will imme-
diately wake-up from SLEEP. The SLEEP
Instruction
Fetched
Instruction
Executed
CLKOUT
GPIO pin
2: T
3: GIE = '1' assumed. In this case, after wakeup, the processor jumps to the interrupt routine. If GIE = '0', execution will continue in-line.
4: CLKOUT is not available in XT, HS or LP osc modes, but shown here for timing reference.
OSC1
WAKE-UP USING INTERRUPTS
OST
PC
(4)
= 1024T
Inst(PC)=SLEEP
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Inst(PC - 1)
PC
OSC
(drawing not to scale). This delay will not be there for INTRC and EXTRC osc mode.
Inst(PC + 1)
SLEEP
PC+1
Processor in
SLEEP
PC+2
Preliminary
T
OST
(2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Inst(PC + 2)
Inst(PC + 1)
Even if the flag bits were checked before executing a
SLEEP instruction, it may be possible for flag bits to
become set before the SLEEP instruction completes. To
determine whether a SLEEP instruction executed, test
the PD bit. If the PD bit is set, the SLEEP instruction
was executed as a NOP.
To ensure that the WDT is cleared, a CLRWDT instruc-
tion should be executed before a SLEEP instruction.
9.8.3
The can be woken up upon bus activity on the LIN bus.
This is done by connecting the BACT pin with either
GP0, GP1 or GP2. The pin which will be connected to
the BACT pin has to be configured to wake the micro-
controller up from SLEEP.
PC+2
instruction will be completely executed before the
wake-up. Therefore, the WDT and WDT
postscaler will be cleared, the TO bit will be set
and the PD bit will be cleared.
WAKE-UP FROM SLEEP UPON BUS
ACTIVITY
Interrupt Latency
Dummy cycle
(Note 3)
PC + 2
Dummy cycle
Inst(0004h)
PIC16C433
0004h
DS41139B-page 65
Inst(0005h)
Inst(0004h)
0005h