PIC16F870T-I/SS Microchip Technology, PIC16F870T-I/SS Datasheet - Page 205
![IC MCU FLASH 2KX14 EE 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F870T-I/SS
Manufacturer Part Number
PIC16F870T-I/SS
Description
IC MCU FLASH 2KX14 EE 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F870-ISO.pdf
(172 pages)
4.PIC16F870-ISO.pdf
(6 pages)
Specifications of PIC16F870T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
For Use With
I3-DB16F871 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F870-ISO PDF datasheet #3
- PIC16F870-ISO PDF datasheet #4
- Current page: 205 of 688
- Download datasheet (3Mb)
14.2
1997 Microchip Technology Inc.
Control Register
bit 7:6
bit 5:4
bit 3:0
Register 14-1: CCPxCON Register
bit 7
Unimplemented: Read as '0'
DCxB1:DCxB0: PWM Duty Cycle bit1 and bit0
Capture Mode:
Compare Mode:
PWM Mode:
CCPxM3:CCPxM0: CCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode,
1001 = Compare mode,
1010 = Compare mode,
1011 = Compare mode,
11xx = PWM mode
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
U-0
Unused
Unused
These bits are the two LSbs (bit1 and bit0) of the 10-bit PWM duty cycle. The upper eight
bits (DCx9:DCx2) of the duty cycle are found in CCPRxL.
—
Initialize CCP pin Low, on compare match force CCP pin High (CCPIF bit is set)
Initialize CCP pin High, on compare match force CCP pin Low (CCPIF bit is set)
Generate software interrupt on compare match
(CCPIF bit is set, CCP pin is unaffected)
Trigger special event (CCPIF bit is set)
U-0
—
W = Writable bit
DCxB1
R/W-0
DCxB0
R/W-0
- n = Value at POR reset
CCPxM3 CCPxM2 CCPxM1
Section 14. CCP
R/W-0
R/W-0
R/W-0
DS31014A-page 14-3
bit 0
CCPxM0
R/W-0
14
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