PIC16LC770-E/SS Microchip Technology, PIC16LC770-E/SS Datasheet - Page 43

• Manufacturer Part Number: PIC16LC770-E/SS
• Description: IC MCU OTP 2KX14 A/D PWM 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC770-E/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC16LC770E/SS

4.0
Program memory is readable during normal operation
(full V
Special Function Registers:
• PMCON1
• PMDATH
• PMDATL
• PMADRH
• PMADRL
REGISTER 4-1:
4.2
The PMDATH:PMDATL registers are loaded with the
contents of program memory addressed by the
PMADRH and PMADRL registers upon completion of a
Program Memory Read command.
2002 Microchip Technology Inc.
DD
PROGRAM MEMORY READ
(PMR)
PMDATH AND PMDATL
REGISTERS
range). It is indirectly addressed through the
bit 7
bit 6-1
bit 0
PROGRAM MEMORY READ CONTROL REGISTER 1 (PMCON1: 18Ch)
Reserved: Read as ‘1’
Unimplemented: Read as '0'
RD: Read Control bit
1 = Initiates a Program memory read (read takes 2 cycles). RD is cleared in hardware.
0 = Reserved
bit 7
Legend:
R = Readable bit
- n = Value at POR
Reserved
R-1
U-0
—
U-0
—
W = Writable bit
’1’ = Bit is set
U-0
—
When interfacing the program memory block, the
PMDATH & PMDATL registers form a 2-byte word,
which holds the 14-bit data. The PMADRH & PMADRL
registers form a 2-byte word, which holds the 12-bit
address of the program memory location being
accessed. Mid-range devices have up to 8K words of
program EPROM with an address range from 0h to
3FFFh. When the device contains less memory than
the full address range of the PMADRH:PMARDL regis-
ters, the Most Significant bits of the PMADRH register
are ignored.
4.1
PMCON1 is the control register for program memory
accesses.
Control bit RD initiates a read operation. This bit cannot
be cleared, only set, in software. It is cleared in hard-
ware at completion of the read operation.
PIC16C717/770/771
PMCON1 REGISTER
S = Settable (cleared in hardware)
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
—
U-0
—
x = Bit is unknown
U-0
—
DS41120B-page 41
R/S-0
RD
bit 0