DSPIC30F2012-20E/SP Microchip Technology, DSPIC30F2012-20E/SP Datasheet - Page 3

IC DSPIC MCU/DSP 12K 28DIP

DSPIC30F2012-20E/SP

Manufacturer Part Number
DSPIC30F2012-20E/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2012-20E/SP

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Module
ADC
I
I
I
2
2
2
C
C
C
Only those issues indicated in the last column apply to the current silicon revision.
Consumption in
Bus Collision
Sleep Mode
Addressing
Addressing
SILICON ISSUE SUMMARY (CONTINUED)
Feature
Current
10-bit
10-bit
Number
Item
17.
18.
19.
20.
When the I
using the same address bits (A10 and A9) as other I
devices, the A10 and A9 bits may not work as expected.
When the I
address of 0x102, the I2CxRCV register content for the lower
address byte is 0x01 rather than 0x02.
When the I
generates a glitch on the SDA and SCL pins, causing a false
communication start in a single-master configuration or a bus
collision in a multi-master configuration.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
device may exceed the device data sheet specifications.
2
2
2
C module is configured for 10-bit addressing
C module is configured as a 10-bit slave with an
C module is enabled, the dsPIC
Issue Summary
dsPIC30F2011/2012
®
DSC device
PD
) of the
2
C
DS80450D-page 3
Revisions
Affected
A1
X
X
X
X
(1)

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