ATMEGA169PA-AN Atmel, ATMEGA169PA-AN Datasheet - Page 149
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ATMEGA169PA-AN
Manufacturer Part Number
ATMEGA169PA-AN
Description
MCU AVR 384KB FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169PA-AN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Part Number
Manufacturer
Quantity
Price
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17.4
17.5
8284A–AVR–10/10
Counter Unit
Output Compare Unit
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
17-2
Figure 17-2. Counter Unit Block Diagram
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or decremented
at each timer clock (clk
selected by the Clock Select bits (CS2[2:0]). When no clock source is selected (CS2[2:0] = 0)
the timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of
whether clk
count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in
the Timer/Counter Control Register (TCCR2A). There are close connections between how the
counter behaves (counts) and how waveforms are generated on the Output Compare output
OC2A. For more details about advanced counting sequences and waveform generation, see
”Modes of Operation” on page
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by
the WGM21:0 bits. TOV2 can be used for generating a CPU interrupt.
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register
(OCR2A). Whenever TCNT2 equals OCR2A, the comparator signals a match. A match will set
the Output Compare Flag (OCF2A) at the next timer clock cycle. If enabled (OCIE2A = 1), the
Output Compare Flag generates an Output Compare interrupt. The OCF2A Flag is automatically
cleared when the interrupt is executed. Alternatively, the OCF2A Flag can be cleared by soft-
ware by writing a logical one to its I/O bit location. The Waveform Generator uses the match
signal to generate an output according to operating mode set by the WGM21:0 bits and Com-
pare Output mode (COM2A1:0) bits. The max and bottom signals are used by the Waveform
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
shows a block diagram of the counter and its surrounding environment.
count
direction
clear
clk
top
bottom
T2
T2
DATA BUS
is present or not. A CPU write overrides (has priority over) all counter clear or
TCNTn
T2
). clk
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
Timer/Counter clock.
Signalizes that TCNT2 has reached maximum value.
Signalizes that TCNT2 has reached minimum value (zero).
152.
T2
direction
can be generated from an external or internal clock source,
count
clear
bottom
Control Logic
top
TOVn
(Int.Req.)
clk
Tn
Prescaler
Oscillator
T/C
clk
I/O
TOSC2
TOSC1
Figure
149
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