ATMEGA164P-20AUR Atmel, ATMEGA164P-20AUR Datasheet - Page 309
![MCU AVR 16KB FLASH 20MHZ 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA164P-20AUR
Manufacturer Part Number
ATMEGA164P-20AUR
Description
MCU AVR 16KB FLASH 20MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA164P-20AUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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24.8.2
8011O–AVR–07/10
Serial Programming Algorithm
When writing serial data to the ATmega164P/324P/644P, data is clocked on the rising edge of
SCK.
When reading data from the ATmega164P/324P/644P, data is clocked on the falling edge of
SCK. See
To program and verify the ATmega164P/324P/644P in the serial programming mode, the follow-
ing sequence is recommended (See four byte instruction formats in
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Programming
3. The serial programming instructions will not work if the communication is out of synchro-
4. The Flash is programmed one page at a time. The memory page is loaded one byte at a
5. The EEPROM array is programmed one byte at a time by supplying the address and data
6. Any memory location can be verified by using the Read instruction which returns the con-
7. At the end of the programming session, RESET can be set high to commence normal
8. Power-off sequence (if needed):
Apply power between V
tems, the programmer can not guarantee that SCK is held low during power-up. In this
case, RESET must be given a positive pulse of at least two CPU clock cycles duration
after SCK has been set to “0”.
Enable serial instruction to pin MOSI.
nization. When in sync. the second byte (0x53), will echo back when issuing the third
byte of the Programming Enable instruction. Whether the echo is correct or not, all four
bytes of the instruction must be transmitted. If the 0x53 did not echo back, give RESET a
positive pulse and issue a new Programming Enable command.
time by supplying the 7 LSB of the address and data together with the Load Program
Memory Page instruction. To ensure correct loading of the page, the data low byte must
be loaded before data high byte is applied for a given address. The Program Memory
Page is stored by loading the Write Program Memory Page instruction with the address
lines 15..8. Before issuing this command, make sure the instruction Load Extended
Address Byte has been used to define the MSB of the address. The extended address
byte is stored until the command is re-issued, that is, the command needs only be issued
for the first page, and when crossing the 64KWord boundary. If polling (
used, the user must wait at least t
16.) Accessing the serial programming interface before the Flash write operation com-
pletes can result in incorrect programming.
together with the appropriate Write instruction. An EEPROM memory location is first
automatically erased before new data is written. If polling is not used, the user must wait
at least t
device, no 0xFFs in the data file(s) need to be programmed.
tent at the selected address at serial output MISO. When reading the Flash memory, use
the instruction Load Extended Address Byte to define the upper address byte, which is
not included in the Read Program Memory instruction. The extended address byte is
stored until the command is re-issued, that is, the command needs only be issued for the
first page, and when crossing the 64KWord boundary.
operation.
Set RESET to “1”.
Turn V
Figure 24-12
CC
WD_EEPROM
power off.
before issuing the next byte. (See
for timing details.
CC
and GND while RESET and SCK are set to “0”. In some sys-
WD_FLASH
before issuing the next page. (See
ATmega164P/324P/644P
Table
24-16.) In a chip erased
Table
24-17):
RDY/BSY
Table 24-
) is not
309
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