PIC16F88-E/SO Microchip Technology, PIC16F88-E/SO Datasheet - Page 655
![IC MCU FLASH 4KX14 EEPROM 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F88-E/SO
Manufacturer Part Number
PIC16F88-E/SO
Description
IC MCU FLASH 4KX14 EEPROM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F87-IP.pdf
(228 pages)
5.PIC16F87-IP.pdf
(8 pages)
6.PIC16F87-IP.pdf
(4 pages)
7.PIC16F87-IP.pdf
(8 pages)
Specifications of PIC16F88-E/SO
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F87-IP PDF datasheet #4
- PIC16F87-IP PDF datasheet #5
- PIC16F87-IP PDF datasheet #6
- PIC16F87-IP PDF datasheet #7
- Current page: 655 of 688
- Download datasheet (3Mb)
A.1
1997 Microchip Technology Inc.
Initiating and Terminating Data Transfer
During times of no data transfer (idle time), both the clock line (SCL) and the data line (SDA) are
pulled high through the external pull-up resistors. The START and STOP conditions determine
the start and stop of data transmission. The START condition is defined as a high to low transition
of the SDA when the SCL is high. The STOP condition is defined as a low to high transition of
the SDA when the SCL is high.
generates these conditions for starting and terminating data transfer. Due to the definition of the
START and STOP conditions, when data is being transmitted, the SDA line can only change state
when the SCL line is low.
Figure A-1:
Table A-1:
Transmitter
Receiver
Master
Slave
Multi-master
Arbitration
Synchronization
Term
Start and Stop Conditions
I
2
C Bus Terminology
The device that sends the data to the bus.
The device that receives the data from the bus.
The device which initiates the transfer, generates the clock and terminates
the transfer.
The device addressed by a master.
More than one master device in a system. These masters can attempt to
control the bus at the same time without corrupting the message.
Procedure that ensures that only one of the master devices will control the
bus. This ensure that the transfer data does not get corrupted.
Procedure where the clock signals of two or more devices are synchro-
nized.
SDA
SCL
Condition
Start
S
Figure A-1
Change
Allowed
of Data
shows the START and STOP conditions. The master
Description
Change
Allowed
of Data
Condition
Appendix A
Stop
P
DS31034A-page 34-3
34
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