PIC18F8390T-I/PT Microchip Technology, PIC18F8390T-I/PT Datasheet - Page 6
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PIC18F8390T-I/PT
Manufacturer Part Number
PIC18F8390T-I/PT
Description
IC PIC MCU FLASH 4KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6310-IPT.pdf
(28 pages)
3.PIC18F6390-IPT.pdf
(414 pages)
4.PIC18F6390-IPT.pdf
(16 pages)
5.PIC18F6390-IPT.pdf
(12 pages)
6.PIC18F6390-IPT.pdf
(6 pages)
7.PIC18F6390-IPT.pdf
(4 pages)
Specifications of PIC18F8390T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8390T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F8410/8490/8493 FAMILY
2.3
The code memory space extends from 000000h to
001FFFh
PIC18FX310/X390/X393 devices and from 000000h to
003FFFh
PIC18FX410/X490/X493 devices.
TABLE 2-2
In addition to the code memory space, there are three
blocks in the configuration and ID space that are
accessible to the user through table reads and table
writes (in ICSP mode). Their locations in the memory
map are shown in Figure 2-5.
Users may store identification information (user ID) in
eight ID registers. These ID registers are mapped in
addresses 200000h through 200007h. The ID locations
read out normally, even after code protection is applied.
DS39624C-page 6
PIC18F6310
PIC18F8310
PIC18F6390
PIC18F6393
PIC18F8390
PIC18F8393
PIC18F6410
PIC18F8410
PIC18F6490
PIC18F6493
PIC18F8490
PIC18F8493
Device
Memory Map
(16
(8 Kbytes)
Kbytes)
IMPLEMENTATION OF CODE
MEMORY
Code Memory Size (Bytes)
in
000000h-003FFFh (16K)
000000h-001FFFh (8K)
in
a
a
single
single
block
block
for
for
Locations 300000h through 30000Dh are reserved for
the configuration bits. These bits select various device
options
“Configuration Word”. These configuration bits read
out normally, even after code protection.
Locations 3FFFFEh and 3FFFFFh are reserved for the
device ID bits. These bits are read-only bits. These bits
may be used by the programmer to identify what device
type is being programmed and are described in
Section 5.0 “Configuration Word”. These device ID
bits read out normally, even after code protection.
2.3.1
Memory in the address space 0000000h to 3FFFFFh is
addressed via the Table Pointer, which is comprised of
three pointer registers:
• TBLPTRU, at RAM address 0FF8h
• TBLPTRH, at RAM address 0FF7h
• TBLPTRL, at RAM address 0FF6h
The 4-bit command, ‘0000’ (core instruction), is used to
load the Table Pointer prior to using many read or write
operations.
Addr[21:16]
TBLPTRU
and
MEMORY ADDRESS POINTER
are
Addr[15:8]
TBLPTRH
© 2007 Microchip Technology Inc.
described
in
TBLPTRL
Addr[7:0]
Section 5.0