ATMEGA8U2-AU Atmel, ATMEGA8U2-AU Datasheet - Page 10
![MCU AVR 8K FLASH 16MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA8U2-AU
Manufacturer Part Number
ATMEGA8U2-AU
Description
MCU AVR 8K FLASH 16MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8U2-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART, USB
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8U2-AU
Manufacturer:
Atmel
Quantity:
2 772
Part Number:
ATMEGA8U2-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Note:
10
0x1A (0x3A)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
Address
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Moreover reserved bits are not
2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on
4. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O reg-
ATmega8U2/16U2/32U2
guaranteed to be read as “0”. Reserved I/O memory addresses should never be written.
isters, the value of single bits can be checked by using the SBIS and SBIC instructions.
all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
isters as data space using LD and ST instructions, $20 must be added to these addresses. The ATmega8U2/16U2/32U2 is
a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from $60 - $1FF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
PORTD
PORTC
PORTB
DDRD
DDRC
TIFR1
TIFR0
DDRB
PIND
PINC
PINB
PORTD7
PORTC7
PORTB7
PIND7
PINC7
Bit 7
DDD7
DDC7
PINB7
DDB7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD6
PORTC6
PORTB6
Bit 6
PIND6
PINC6
PINB6
DDD6
DDC6
DDB6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD5
PORTC5
PORTB5
Bit 5
PIND5
PINC5
PINB5
DDD5
DDC5
DDB5
ICF1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD4
PORTC4
PORTB4
Bit 4
PIND4
PINC4
PINB4
DDD4
DDC4
DDB4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD3
PORTB3
OCF1C
Bit 3
PIND3
DDD3
PINB3
DDB3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD2
PORTC2
PORTB2
OCF1B
OCF0B
Bit 2
PIND2
PINC2
PINB2
DDD2
DDC2
DDB2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD1
PORTC1
PORTB1
OCF1A
OCF0A
Bit 1
PIND1
PINC1
PINB1
DDD1
DDC1
DDB1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD0
PORTC0
PORTB0
Bit 0
PIND0
PINC0
PINB0
TOV1
TOV0
DDD0
DDC0
DDB0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
7799DS–AVR–11/10
page 136
page 107
page 83
page 83
page 83
page 82
page 82
page 82
page 82
page 82
page 82
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