PIC18LF2221-I/SS Microchip Technology, PIC18LF2221-I/SS Datasheet - Page 13
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PIC18LF2221-I/SS
Manufacturer Part Number
PIC18LF2221-I/SS
Description
IC PIC MCU FLASH 2KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(402 pages)
2.PIC18F2221-ISO.pdf
(8 pages)
3.PIC18F2221-ISO.pdf
(30 pages)
4.PIC18F2221-ISO.pdf
(46 pages)
5.PIC18LF2221-IML.pdf
(394 pages)
Specifications of PIC18LF2221-I/SS
Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF2221-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FIGURE 2-15:
2.8
The
devices are designed to support an alternate
programming input: the dedicated ICSP/ICD port. The
primary purpose of this port is to provide an alternate
In-Circuit Debugging (ICD) option and free the pins
(RB6, RB7 and MCLR) that would normally be used for
debugging the application. In conjunction with ICD
capability, however, the dedicated ICSP/ICD port also
provides an alternate port for ICSP.
Setting the ICPRT Configuration bit enables the
dedicated ICSP/ICD port. The dedicated ICSP/ICD
port functions the same as the default ICSP/ICD port;
however, alternate pins are used instead of the default
pins.
pins for ICSP purposes:
The dedicated ICSP/ICD port is an alternate port. Thus,
ICSP is still available through the default port even
though the ICPRT Configuration bit is set. When the
V
TABLE 2-10:
2010 Microchip Technology Inc.
MCLR/V
RB6
RB7
Legend: I = Input, O = Output, P = Power
IH
is seen on the MCLR/V
Pin Name
PGC
PGD
Table 2-10
PIC18F4455/4458/4550/4553
Dedicated ICSP/ICD Port
(44-Pin TQFP Only)
PP
/RE3
P3
4-Bit Command
1
P2
1
identifies the functionally equivalent
ICSP™ EQUIVALENT PINS
2
P4
0
Pin Name
TABLE WRITE, POST-INCREMENT TIMING (1101)
3
PGC
PGD
V
1
PP
4
PP
1
/RE3 pin prior to applying
P2A
P5
P2B
1
Pin Type
0
I/O
2
P
0
I
44-pin
0
3
0
4
0
PIC18F2XXX/4XXX FAMILY
NC/ICRST/ICV
NC/ICCK/ICPGC
NC/ICDT/ICPGD
5
TQFP
Dedicated Pins
0
6
PGD = Input
0
16-Bit Data Payload
4
7
1
During Programming
8
0
PP
9
V
ICRST/ICV
seen on ICRST/ICV
V
ignored.
0
IH
PP
Note:
10
0
/RE3, then the state of the MCLR/V
to the ICRST/ICV
Programming Enable
Serial Clock
Serial Data
C
11
1
12
1
PP
The ICPRT Configuration bit can only be
programmed through the default ICSP
port. Chip Erase functions through the
dedicated ICSP/ICD port do not affect this
bit.
When the ICPRT Configuration bit is set
(dedicated ICSP/ICD port enabled), the
NC/ICPORTS pin must be tied to either
V
The ICPRT Configuration bit must be
maintained clear for all 28-pin and 40-pin
devices; otherwise, unexpected operation
may occur.
13
DD
pin is ignored. Likewise, when the V
1
or V
14
1
3
PP
15
SS
Pin Description
0
.
PP
prior to applying V
16
0
pin, then the state of the
P5A
Fetch Next 4-Bit Command
1
n
2
n
DS39622L-page 13
3
n
PP
IH
4
/RE3 pin is
n
to MCLR/
IH
is