ATMEGA644A-AUR Atmel, ATMEGA644A-AUR Datasheet - Page 242
![IC MCU AVR 64K FLASH 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA644A-AUR
Manufacturer Part Number
ATMEGA644A-AUR
Description
IC MCU AVR 64K FLASH 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644A-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
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Figure 22-1. Analog-to-digital Converter Block Schematic
22.3
8272A–AVR–01/10
BANDGAP (1.1V)
ADC[7:0]
REFERENCE
REFERENCE
(1.1V/2.56V)
INTERNAL
AVCC
AREF
Operation
GND
8-BIT DATABUS
ADC[2:0]
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
the AREF pin minus 1 LSB. Optionally, AVCC or an internal 2.56V reference voltage may be
connected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The internal
voltage reference may thus be decoupled by an external capacitor at the AREF pin to improve
noise immunity.
The analog input channel and differential gain are selected by writing to the MUX bits in
ADMUX. Any of the ADC input pins, as well as GND and a fixed bandgap voltage reference, can
be selected as single ended inputs to the ADC. A selection of ADC input pins can be selected as
positive and negative inputs to the differential gain amplifier.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
ADC MULTIPLEXER
SELECT (ADMUX)
INPUT
INPUT
NEG
MUX
POS
MUX
MUX DECODER
+
-
REGISTER B (ADCSRB)
ADC CTRL & STATUS
AMPLIFIER
GAIN
10-bit DAC
REGISTER A (ADCSRA)
ADC CTRL & STATUS
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
+
-
ADTS[2:0]
START
TRIGGER
SELECT
SAMPLE & HOLD
INTERRUPT
COMPARATOR
ADC
MULTIPLEXER
OUTPUT
FLAGS
15
ADC DATA REGISTER
(ADCH/ADCL)
0
242
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