ATMEGA16L-8AQ Atmel, ATMEGA16L-8AQ Datasheet - Page 88

MCU AVR 16K FLASH 8MHZ 44-TQFP

ATMEGA16L-8AQ

Manufacturer Part Number
ATMEGA16L-8AQ
Description
MCU AVR 16K FLASH 8MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA16L-8AQ

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16L-8AQ
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA16L-8AQR
Manufacturer:
Atmel
Quantity:
10 000
Special Function IO
Register – SFIOR
2466T–AVR–07/10
sampling, the maximum frequency of an external clock it can detect is half the sampling fre-
quency (Nyquist sampling theorem). However, due to variation of the system clock frequency
and duty cycle caused by Oscillator source (crystal, resonator, and capacitors) tolerances, it is
recommended that maximum frequency of an external clock source is less than f
An external clock source can not be prescaled.
Figure 39. Prescaler for Timer/Counter0 and Timer/Counter1
Note:
• Bit 0 – PSR10: Prescaler Reset Timer/Counter1 and Timer/Counter0
When this bit is written to one, the Timer/Counter1 and Timer/Counter0 prescaler will be reset.
The bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will
have no effect. Note that Timer/Counter1 and Timer/Counter0 share the same prescaler and a
reset of this prescaler will affect both timers. This bit will always be read as zero.
Bit
Read/Write
Initial Value
PSR10
clk
T0
T1
I/O
1. The synchronization logic on the input pins (
Synchronization
Synchronization
ADTS2
R/W
7
0
ADTS1
R/W
6
0
ADTS0
R/W
5
0
clk
Clear
T1
R
4
0
ACME
R/W
3
0
T1/T0)
PUD
R/W
is shown in
2
0
(1)
PSR2
R/W
1
0
Figure
ATmega16(L)
PSR10
R/W
0
0
38.
clk
T0
clk_I/O
SFIOR
/2.5.
88

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