ATMEGA325P-20AUR Atmel, ATMEGA325P-20AUR Datasheet - Page 99
ATMEGA325P-20AUR
Manufacturer Part Number
ATMEGA325P-20AUR
Description
MCU AVR 32K FLASH 20MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA3250P-20AU.pdf
(364 pages)
Specifications of ATMEGA325P-20AUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14.8
8023F–AVR–07/09
Timer/Counter Timing Diagrams
• The timer starts counting from a value higher than the one in OCR0A, and for that reason
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set.
the count sequence close to the MAX value in all modes other than phase correct PWM mode.
Figure 4. Timer/Counter Timing Diagram, no Prescaling
Figure 5
Figure 5. Timer/Counter Timing Diagram, with Prescaler (f
Figure 6
Figure 6. Timer/Counter Timing Diagram, Setting of OCF0A, with Prescaler (f
symmetry around BOTTOM the OCn value at MAX must correspond to the result of an up-
counting Compare Match.
misses the Compare Match and hence the OCn change that would have happened on the way
up.
TCNTn
TCNTn
TCNTn
(clk
(clk
(clk
OCRnx
OCFnx
TOVn
TOVn
clk
clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
I/O
I/O
Tn
Tn
Tn
/1)
/8)
/8)
shows the same timing data, but with the prescaler enabled.
shows the setting of OCF0A in all modes except CTC mode.
Figure 4
contains timing data for basic Timer/Counter operation. The figure shows
OCRnx - 1
MAX - 1
MAX - 1
OCRnx
MAX
MAX
OCRnx Value
ATmega325P/3250P
clk_I/O
OCRnx + 1
BOTTOM
BOTTOM
/8)
T0
) is therefore shown as a
clk_I/O
BOTTOM + 1
BOTTOM + 1
OCRnx + 2
/8)
99
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