DSPIC30F3013-20E/ML Microchip Technology, DSPIC30F3013-20E/ML Datasheet - Page 18
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DSPIC30F3013-20E/ML
Manufacturer Part Number
DSPIC30F3013-20E/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(6 pages)
4.DSPIC30F2011-20IP.pdf
(26 pages)
5.DSPIC30F3012-20ISO.pdf
(14 pages)
6.DSPIC30F3012-20ISO.pdf
(20 pages)
Specifications of DSPIC30F3013-20E/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
dsPIC30F Family Reference Manual
35.3.3.3
Figure 35-10: SPI Master, Frame Slave Connection Diagram
Figure 35-11: SPI Master, Frame Slave Timing (FRMDLY = 0)
Figure 35-12: SPI Master, Frame Slave Timing (FRMDLY = 1)
DS70272B-page 35-18
SPI Master, Frame Slave Mode
(FRMPOL = 1)
(FRMPOL = 0)
(FRMPOL = 1)
(FRMPOL = 0)
(SPI1 Master, Framed Slave)
(CKP = 1)
(CKP = 0)
(CKP = 1)
(CKP = 0)
Write to SPI1BUF
In the SPI Master/Frame Slave mode, the module generates the clock signal but uses the Slave
module frame synchronization signal for data transmission (Figure 35-10). This mode is enabled
by setting the MSTEN, FRMEN and SPIFSD bits to ‘1’.
In this mode, the SS1 pin is an input and is sampled on the sample edge of the SPI1 clock. When
it is sampled in its active state, data will be transmitted on the subsequent transmit edge of the
SPI1 clock. The interrupt flag, SPI1IF, is set when the transmission is complete. The user
application must make sure that the correct transmission data is loaded into the SPI1BUF before
the signal is received at the SS1 pin.
SDO1
SDO1
SCK1
SCK1
SCK1
SCK1
SDI1
SDI1
SS1
SS1
SS1
SS1
dsPIC30F
Write to SPI1BUF
SDO1
SCK1
SDI1
SS1
Sample SS1 pin for Pulse
Serial Clock
Frame Synchronization
Pulse
bit 15
bit 15
bit 15
bit 15
SDI1
SDO1
SCK1
SS1
bit 14
bit 14
bit 14
bit 14
Pulse Generated by SS1;
Receive Samples at SDI1
Receive Samples at SDI1
PROCESSOR 2
bit 13
bit 13
bit 13
bit 13
© 2008 Microchip Technology Inc.
bit 12
bit 12
bit 12
bit 12