DSPIC33FJ12MC202-I/SS Microchip Technology, DSPIC33FJ12MC202-I/SS Datasheet - Page 150
DSPIC33FJ12MC202-I/SS
Manufacturer Part Number
DSPIC33FJ12MC202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ12MC201-ISO.pdf
(288 pages)
3.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
4.DSPIC33FJ12MC202-IML.pdf
(282 pages)
Specifications of DSPIC33FJ12MC202-I/SS
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ12MC202-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC24HJ12GP201-ISO PDF datasheet
- DSPIC33FJ12MC201-ISO PDF datasheet #2
- DSPIC33FJ12MC201-ISO PDF datasheet #3
- DSPIC33FJ12MC202-IML PDF datasheet #4
- Current page: 150 of 288
- Download datasheet (5Mb)
dsPIC33FJ12MC201/202
14.1
Configure the Output Compare modes by setting the
appropriate Output Compare Mode (OCM<2:0>) bits in
the Output Compare Control (OCxCON<2:0>) register.
Table 14-1 lists the different bit settings for the Output
Compare modes. Figure 14-2 illustrates the output
compare operation for various modes. The user
application must disable the associated timer when
writing to the output compare control registers to avoid
malfunctions.
TABLE 14-1:
DS70265D-page 148
OCM<2:0>
Note:
000
001
010
011
100
101
110
111
Output Compare Modes
See Section 13. “Output Compare” in
the “dsPIC33F Family Reference Manual”
(DS70209) for OCxR and OCxRS register
restrictions.
Module Disabled
Active-Low One-Shot
Active-High One-Shot
Toggle Mode
Delayed One-Shot
Continuous Pulse mode
PWM mode without fault
protection
PWM mode with fault protection 0, if OCxR is zero
OUTPUT COMPARE MODES
Mode
Controlled by GPIO register
Current output is maintained
0, if OCxR is zero
1, if OCxR is non-zero
1, if OCxR is non-zero
Preliminary
OCx Pin Initial State
0
1
0
0
OCx Rising edge
OCx Falling edge
OCx Rising and Falling edge
OCx Falling edge
OCx Falling edge
No interrupt
OCFA Falling edge for OC1 to OC4
OCx Interrupt Generation
© 2009 Microchip Technology Inc.
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