DSPIC33FJ12MC202-I/SS Microchip Technology, DSPIC33FJ12MC202-I/SS Datasheet - Page 4
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DSPIC33FJ12MC202-I/SS
Manufacturer Part Number
DSPIC33FJ12MC202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ12MC201-ISO.pdf
(288 pages)
3.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
4.DSPIC33FJ12MC202-IML.pdf
(282 pages)
Specifications of DSPIC33FJ12MC202-I/SS
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ12MC202-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Silicon Errata Issues
1. Module: JTAG
2. Module: UART
3. Module: UART
DS80461E-page 4
Note:
JTAG programming does not work.
Work around
None.
Affected Silicon Revisions
UART receptions may be corrupted if the Baud
Rate Generator is set up for 4x mode (BRGH = 1).
Work around
Use the 16x baud rate option (BRGH = 0) and
adjust the baud rate accordingly.
Affected Silicon Revisions
The auto-baud feature may not calculate the correct
baud rate when the High Baud Rate Enable bit,
BRGH, is set. With the BRGH bit set, the baud rate
calculation used is the same as BRG = 0.
Work around
If the auto-baud feature is needed, use the Low
Baud Rate mode by clearing the BRGH bit.
Affected Silicon Revisions
A2
A2
A2
X
X
X
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A5).
A3
A3
A3
X
X
X
A4
A4
A4
X
X
X
A5
A5
A5
X
X
X
4. Module: UART
5. Module: UART
6. Module: UART
With the auto-baud feature selected, the Sync
Break character (0x55) may be loaded into the
FIFO as data.
Work around
To prevent the Sync Break character from being
loaded into the FIFO, load the UxBRG register with
either 0x0000 or 0xFFFF prior to enabling the
auto-baud feature (ABAUD = 1).
Affected Silicon Revisions
The auto-baud feature may miscalculate certain
baud rate and clock speed combinations, resulting
in a BRG value that is greater than or less than the
expected value by 1. This may result in reception
or transmission failures.
Work around
Test the auto-baud rate at various clock speed and
baud rate combinations that would be used in an
application. If an inaccurate BRG value is
generated, manually correct the baud rate in user
software.
Affected Silicon Revisions
When an auto-baud is detected, the receive
interrupt may occur twice. The first interrupt occurs
at the beginning of the Start bit and the second
after reception of the Sync field character.
Work around
If an extra interrupt is detected, ignore the
additional interrupt.
Affected Silicon Revisions
A2
A2
A2
X
X
X
A3
A3
A3
X
X
X
A4
A4
A4
X
X
X
© 2010 Microchip Technology Inc.
A5
A5
A5
X
X
X