PIC18F85J90-I/PT Microchip Technology, PIC18F85J90-I/PT Datasheet - Page 29

• Manufacturer Part Number: PIC18F85J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F85J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 67
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 67
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 5-5:
 2009 Microchip Technology Inc.
CFGB80 = Byte sum of [(CW1 & 04E1h) + (CW2 & 0FC7h) + (CW3 & 03F8h)]
CFGB60 = Byte sum of [(CW1 & 04E1h) + (CW2 & 0FC7h) + (CW3 & 0100h)]
Legend: Item
CFGB = Byte sum of [(CW1 & 0CE1h) + (CW2 & 0FC7h) + (CW3 & 0100h)]
Note:
PIC18F85J90
PIC18F87J10
Family
SUM(a:b) =
+
CW
CFGB
CW3 address is the last location – 2 of implemented program memory; CW2 is the last location – 4;
CW1 is the last location – 6.
CHECKSUM EQUATION FOR PIC18F6XJXX/8XJXX (CONTINUED)
=
=
=
PIC18F63J90
PIC18F64J90
PIC18F64J95
PIC18F65J90
PIC18F83J90
PIC18F84J90
PIC18F84J95
PIC18F85J90
PIC18F65J10
PIC18F65J15
PIC18F66J10
PIC18F66J15
PIC18F67J10
PIC18F85J10
PIC18F85J15
PIC18F86J10
PIC18F86J15
PIC18F87J10
Description
Byte sum of locations a to b inclusive (all 3 bytes of code memory)
Addition
Configuration Word
Configuration Block (Masked)
Device
Read Code Protection
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
PIC18F6XJXX/8XJXX
CFGB60 + SUM(00000:17FF7h)
CFGB60 + SUM(00000:1FFF7h)
CFGB80 + SUM(00000:17FF7h)
CFGB80 + SUM(00000:1FFF7h)
CFGB60 + SUM(0000:BFF7h)
CFGB60 + SUM(0000:FFF7h)
CFGB80 + SUM(0000:BFF7h)
CFGB80 + SUM(0000:FFF7h)
CFGB60 + SUM(0000:7FF7h)
CFGB80 + SUM(0000:7FF7h)
CFGB + SUM(0000:1FF7h)
CFGB + SUM(0000:3FF7h)
CFGB + SUM(0000:5FF7h)
CFGB + SUM(0000:7FF7h)
CFGB + SUM(0000:1FF7h)
CFGB + SUM(0000:3FF7h)
CFGB + SUM(0000:5FF7h)
CFGB + SUM(0000:7FF7h)
Checksum Computation
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
DS39644L-page 29