PIC16LC71-04I/P Microchip Technology, PIC16LC71-04I/P Datasheet - Page 80
![IC MCU OTP 1KX14 A/D 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16LC71-04I/P
Manufacturer Part Number
PIC16LC71-04I/P
Description
IC MCU OTP 1KX14 A/D 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16LC711-04IP.pdf
(177 pages)
Specifications of PIC16LC71-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
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PIC16C71X
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
DS30272A-page 80
2nd Cycle
1st Cycle
TABLE
Return with Literal in W
[ label ]
0
k
TOS
None
The W register is loaded with the eight
bit literal 'k'. The program counter is
loaded from the top of the stack (the
return address). This is a two cycle
instruction.
1
2
CALL TABLE ;W contains table
•
•
•
ADDWF PC
RETLW k1
RETLW k2
•
•
•
RETLW kn
Before Instruction
After Instruction
Decode
NOP
Q1
11
k
(W);
255
PC
W
W
RETLW k
literal 'k'
;W = offset
;Begin table
;
; End of table
01xx
Read
NOP
;offset value
Q2
;W now has table value
=
=
0x07
value of k8
kkkk
NOP
NOP
Q3
from the
Write to
kkkk
W, Pop
Stack
NOP
Q4
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2nd Cycle
1st Cycle
Return from Subroutine
[ label ]
None
TOS
None
Return from subroutine. The stack is
POPed and the top of the stack (TOS)
is loaded into the program counter.
This is a two cycle instruction.
1
2
After Interrupt
RETURN
Decode
NOP
Q1
00
1997 Microchip Technology Inc.
PC
PC =
RETURN
0000
NOP
NOP
Q2
TOS
0000
NOP
NOP
Q3
the Stack
Pop from
1000
NOP
Q4
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