DSPIC33FJ64GS606T-I/MR Microchip Technology, DSPIC33FJ64GS606T-I/MR Datasheet - Page 144
![MCU/DSP 16BIT 64KB FLASH 64QFN](/photos/12/13/121325/c04-149_mr_sml.jpg)
DSPIC33FJ64GS606T-I/MR
Manufacturer Part Number
DSPIC33FJ64GS606T-I/MR
Description
MCU/DSP 16BIT 64KB FLASH 64QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ32GS406-IPT.pdf
(418 pages)
Specifications of DSPIC33FJ64GS606T-I/MR
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-VFQFN, Exposed Pad
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, QEI, POR, PWM, WDT
Number Of I /o
58
Ram Size
9K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Numeric And Arithmetic Format
Fixed-Point or Floating-Point
Instruction Set Architecture
Harvard
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
58
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- Current page: 144 of 418
- Download datasheet (3Mb)
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 7-15:
DS70591C-page 144
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1: Interrupts disabled on devices without ECAN™ modules
U-0
U-0
—
—
Unimplemented: Read as ‘0’
IC4IE: Input Capture Channel 4 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
IC3IE: Input Capture Channel 3 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA3IE: DMA Channel 3 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request has enabled
C1IE: ECAN1 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
C1RXIE: ECAN1 Receive Data Ready Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SPI2IE: SPI2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SPI2EIE: SPI2 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
R/W-0
IC4IE
U-0
—
IEC2: INTERRUPT ENABLE CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
R/W-0
IC3IE
U-0
—
DMA3IE
R/W-0
U-0
Preliminary
—
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
C1IE
R/W-0
U-0
—
(1)
(1)
C1RXIE
R/W-0
U-0
—
(1)
2010 Microchip Technology Inc.
x = Bit is unknown
SPI2IE
R/W-0
U-0
—
SPI2EIE
R/W-0
U-0
—
bit 8
bit 0
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