PIC16F83-10I/SO Microchip Technology, PIC16F83-10I/SO Datasheet - Page 173
![IC MCU FLASH 512X14 EE 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F83-10I/SO
Manufacturer Part Number
PIC16F83-10I/SO
Description
IC MCU FLASH 512X14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16LF84A-04P.pdf
(125 pages)
3.PIC16LF83-04P.pdf
(4 pages)
Specifications of PIC16F83-10I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
896B (512 x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
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11.4
1997 Microchip Technology Inc.
GIE bit
INSTRUCTION
FLOW
T0IF bit
Instruction
fetched
Instruction
executed
Timer0
CLKOUT(3)
OSC1
PC
TMR0 Interrupt
Note 1: Interrupt flag bit T0IF is sampled here (every Q1).
Q1
2: Interrupt latency = 4T
3: CLKOUT is available only in RC oscillator mode.
FEh
Inst (PC)
Inst (PC-1)
Q2
The TMR0 interrupt is generated when the TMR0 register overflows from FFh to 00h. This
overflow sets bit T0IF (INTCON<2>). The interrupt can be masked by clearing bit T0IE
(INTCON<5>). Bit T0IF must be cleared in software by the Timer0 module interrupt service rou-
tine before re-enabling this interrupt. The TMR0 interrupt cannot awaken the processor from
SLEEP since the timer is shut-off during SLEEP. See
Figure 11-4: TMR0 Interrupt Timing
1
PC
Q3
Q4
CY
Q1
FFh
where T
Inst (PC+1)
Inst (PC)
Q2
1
PC +1
CY
Q3
= instruction cycle time.
Q4
Q1
00h
Dummy cycle
Q2
PC +1
Q3
Section 11. Timer0
Q4
Figure 11-4
Q1
01h
Dummy cycle
Inst (0004h)
Q2
0004h
Q3
for Timer0 interrupt timing.
Q4
Q1
DS31011A-page 11-5
02h
Inst (0004h)
Inst (0005h)
Q2
0005h
Q3
Q4
11
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