PIC16F73-I/ML Microchip Technology, PIC16F73-I/ML Datasheet - Page 64

IC MCU FLASH 4KX14 A/D 28QFN

PIC16F73-I/ML

Manufacturer Part Number
PIC16F73-I/ML
Description
IC MCU FLASH 4KX14 A/D 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F73-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
22
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm
RoHS Compliant
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16F73I/ML
PIC16F7X
FIGURE 9-1:
DS30325B-page 62
RC4/SDI/SDA
RC5/SDO
RA5/SS/AN4
RC3/SCK/
SCL
Peripheral OE
Read
SS Control
Select
TRISC<3>
Edge
bit0
Enable
Select
Edge
SSPBUF reg
SSP BLOCK DIAGRAM
(SPI MODE)
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
Write
Prescaler
4, 16, 64
Clock
Shift
TMR2 Output
Data Bus
Internal
2
T
CY
To enable the serial port, SSP enable bit, SSPEN
(SSPCON<5>) must be set. To reset or reconfigure SPI
mode, clear bit SSPEN, re-initialize the SSPCON reg-
ister, and then set bit SSPEN. This configures the SDI,
SDO, SCK, and SS pins as serial port pins. For the pins
to behave as the serial port function, they must have
their data direction bits (in the TRISC register) appro-
priately programmed. That is:
• SDI must have TRISC<4> set
• SDO must have TRISC<5> cleared
• SCK (Master mode) must have TRISC<3>
• SCK (Slave mode) must have TRISC<3> set
• SS must have TRISA<5> set and ADCON must
.
cleared
be configured such that RA5 is a digital I/O
Note 1: When the SPI is in Slave mode with SS pin
2: If the SPI is used in Slave mode with
3: When the SPI is in Slave mode with SS
control enabled (SSPCON<3:0> = 0100),
the SPI module will reset if the SS pin is set
to V
CKE = '1', then the SS pin control must be
enabled.
pin control enabled (SSPCON<3:0> =
‘0100’), the state of the SS pin can affect
the state read back from the TRISC<5>
bit. The Peripheral OE signal from the
SSP module into PORTC controls the
state that is read back from the
TRISC<5> bit (see Section 4.3 for infor-
mation on PORTC). If Read-Modify-Write
instructions, such as BSF are performed
on the TRISC register while the SS pin is
high, this will cause the TRISC<5> bit to
be set, thus disabling the SDO output.
DD
.
 2002 Microchip Technology Inc.

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