PIC16F74-I/PTG Microchip Technology, PIC16F74-I/PTG Datasheet - Page 56
PIC16F74-I/PTG
Manufacturer Part Number
PIC16F74-I/PTG
Description
IC MCU FLASH 4KX14 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F74-I/PTG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 56 of 174
- Download datasheet (5Mb)
PIC16F7X
REGISTER 8-1:
DS30325B-page 54
bit 7-6
bit 5-4
bit 3-0
CCP1CON REGISTER/CCP2CON REGISTER (ADDRESS: 17h/1Dh)
bit 7
Unimplemented: Read as '0'
CCPxX:CCPxY: PWM Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM3:CCPxM0: CCPx Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCPxIF bit is set)
1001 = Compare mode, clear output on match (CCPxIF bit is set)
1010 = Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is
1011 = Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is unaffected);
11xx = PWM mode
Legend:
R = Readable bit
- n = Value at POR reset
U-0
—
unaffected)
CCP1 clears Timer1; CCP2 clears Timer1 and starts an A/D conversion (if A/D module
is enabled)
U-0
—
CCPxX
R/W-0
W = Writable bit
’1’ = Bit is set
CCPxY
R/W-0
CCPxM3
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
CCPxM2
R/W-0
2002 Microchip Technology Inc.
CCPxM1
x = Bit is unknown
R/W-0
CCPxM0
R/W-0
bit 0
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