DSPIC33FJ64MC508T-I/PT Microchip Technology, DSPIC33FJ64MC508T-I/PT Datasheet - Page 111

• Manufacturer Part Number: DSPIC33FJ64MC508T-I/PT
• Description: IC DSPIC MCU/DSP 64K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC508T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• For Use With: MA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164328 - MODULE SKT FOR 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

REGISTER 7-13:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
C2RXIE
FLTAIE
R/W-0
R/W-0
FLTAIE: PWM Fault A Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
DMA5IE: DMA Channel 5 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
QEIIE: QEI Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
PWMIE: PWM Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
C2IE: ECAN2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
C2RXIE: ECAN2 Receive Data Ready Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT4IE: External Interrupt 4 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT3IE: External Interrupt 3 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T9IE: Timer9 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T8IE: Timer8 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
MI2C2IE: I2C2 Master Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT4IE
R/W-0
U-0
—
IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
DMA5IE
INT3IE
R/W-0
R/W-0
dsPIC33FJXXXMCX06/X08/X10
R/W-0
T9IE
U-0
—
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
R/W-0
T8IE
U-0
—
MI2C2IE
R/W-0
R/W-0
QEIIE
x = Bit is unknown
SI2C2IE
PWMIE
R/W-0
R/W-0
DS70287C-page 109
R/W-0
R/W-0
C2IE
T7IE
bit 8
bit 0