DSPIC33FJ64GS606-E/PT Microchip Technology, DSPIC33FJ64GS606-E/PT Datasheet - Page 314

• Manufacturer Part Number: DSPIC33FJ64GS606-E/PT
• Description: MCU/DSP 16BIT 64KB FLASH 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GS606-E/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, QEI, POR, PWM, WDT
• Number Of I /o: 58
• Ram Size: 9K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Numeric And Arithmetic Format: Fixed-Point or Floating-Point
• Instruction Set Architecture: Harvard
• Device Million Instructions Per Second: 40 MIPs
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 58
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 22-3:
DS70591C-page 314
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-1
bit 0
Note 1: The encoding results are shifted left two bits so bits 1-0 of the result are always zero.
R/W-0
R/W-0
2: As an alternative to using the ADBASE Register, the ADCP0-ADCP12 ADC Pair Conversion Complete
Interrupts can be used to invoke A to D conversion completion routines for individual ADC input pairs.
ADBASE<15:1>: This register contains the base address of the user’s ADC Interrupt Service Routine
jump table. This register, when read, contains the sum of the ADBASE register contents and the
encoded value of the PxRDY Status bits.
The encoder logic provides the bit number of the highest priority PxRDY bits where P0RDY is the
highest priority, and P6RDY is the lowest priority.
Unimplemented: Read as ‘0’
R/W-0
R/W-0
ADBASE: A/D BASE REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
ADBASE<7:1>
R/W-0
R/W-0
Preliminary
ADBASE<15:8>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1,2)
R/W-0
R/W-0
R/W-0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
R/W-0
R/W-0
R/W-0
U-0
—
bit 8
bit 0