PIC18LF27J53-I/ML Microchip Technology, PIC18LF27J53-I/ML Datasheet - Page 55
![IC PIC MCU 128KB FLASH 28QFN](/photos/19/6/190629/4733462_sml.jpg)
PIC18LF27J53-I/ML
Manufacturer Part Number
PIC18LF27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18LF27J53-I/ML
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 3.6V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF27J53-I/ML
Manufacturer:
ATMEL
Quantity:
101
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 55 of 496
- Download datasheet (5Mb)
TABLE 3-3:
2010 Microchip Technology Inc.
Note 1:
T1OSC or LFINTOSC
Primary Device Clock
2:
3:
4:
(PRI_IDLE mode)
before Wake-up
Clock Source
HFINTOSC
(Sleep mode)
T
required delays (see
Includes both the HFINTOSC 16 MHz source and postscaler derived frequencies.
T
Execution continues during the HFINTOSC stabilization period, T
CSD
OST
None
is the Oscillator Start-up Timer. t
is a required delay when waking from Sleep and all Idle modes and runs concurrently with any other
EXIT DELAY ON WAKE-UP BY RESET FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
(2)
(1)
Section 3.4 “Idle
after Wake-up
Clock Source
HFINTOSC
HFINTOSC
HFINTOSC
HFINTOSC
LP, XT, HS
LP, XT, HS
LP, XT, HS
LP, XT, HS
EC, RC
EC, RC
EC, RC
EC, RC
HSPLL
HSPLL
HSPLL
HSPLL
PLL
Preliminary
Modes”). On Reset, HFINTOSC defaults to 1 MHz.
is the PLL Lock-out Timer.
(2)
(1)
(1)
(1)
PIC18(L)F2X/4XK22
T
T
T
OST
OST
OST
Exit Delay
T
T
T
T
T
T
T
T
T
IOBST
IOBST
IOBST
None
CSD
OST
CSD
OST
CSD
OST
CSD
+ t
+ t
+ t
(1)
(3)
PLL
(1)
(4)
PLL
(1)
(3)
PLL
(1)
.
(4)
(4)
(3)
(3)
(3)
Clock Ready Status
Bit (OSCCON)
DS41412D-page 55
OSTS
OSTS
OSTS
OSTS
IOSF
IOSF
IOSF
IOSF
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