PIC18F4525-E/P Microchip Technology, PIC18F4525-E/P Datasheet - Page 283
![IC MCU FLASH 24KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F4525-E/P
Manufacturer Part Number
PIC18F4525-E/P
Description
IC MCU FLASH 24KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2525-ISO.pdf
(412 pages)
3.PIC18F2525-ISO.pdf
(18 pages)
4.PIC18F2525-ISO.pdf
(18 pages)
5.PIC18F2525-ISO.pdf
(6 pages)
6.PIC18F2525-ISO.pdf
(6 pages)
7.PIC18LF4620-IP.pdf
(390 pages)
Specifications of PIC18F4525-E/P
Program Memory Type
FLASH
Program Memory Size
48KB (24K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3986 B
Interface Type
SPI/I2C/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DB18F4620 - BOARD DAUGHTER ICEPIC3DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4525-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC18F2221-ISO PDF datasheet
- PIC18F2525-ISO PDF datasheet #2
- PIC18F2525-ISO PDF datasheet #3
- PIC18F2525-ISO PDF datasheet #4
- PIC18F2525-ISO PDF datasheet #5
- PIC18F2525-ISO PDF datasheet #6
- PIC18LF4620-IP PDF datasheet #7
- Current page: 283 of 390
- Download datasheet (7Mb)
BTG
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction:
After Instruction:
Decode
PORTC =
PORTC =
Q1
register ‘f’
BTG
Bit Toggle f
BTG f, b {,a}
0
0
a
(f<b>)
None
Bit ‘b’ in data memory location ‘f’ is
inverted.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f
Section 24.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
Read
0111
Q2
f
b < 7
0111 0101 [75h]
0110 0101 [65h]
[0,1]
255
f<b>
PORTC,
bbba
Process
Data
Q3
95 (5Fh). See
4, 0
ffff
register ‘f’
PIC18F2525/2620/4525/4620
Write
Q4
ffff
Preliminary
BOV
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If OVERFLOW =
If OVERFLOW =
Q1
No
Q1
PC
PC
Read literal
Read literal
operation
Branch if Overflow
BOV
-128
if OVERFLOW bit is ‘1’
(PC) + 2 + 2n
None
If the OVERFLOW bit is ‘1’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
Q2
Q2
No
‘n’
‘n’
=
=
=
n
n
address (HERE)
1;
address (Jump)
0;
address (HERE + 2)
127
0100
BOV
operation
Process
Process
Data
Data
PC
Q3
No
Q3
DS39626B-page 281
Jump
nnnn
Write to PC
operation
operation
Q4
No
Q4
No
nnnn
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