DSPIC33FJ64GP310T-I/PF Microchip Technology, DSPIC33FJ64GP310T-I/PF Datasheet - Page 318
![IC DSPIC MCU/DSP 64K 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
DSPIC33FJ64GP310T-I/PF
Manufacturer Part Number
DSPIC33FJ64GP310T-I/PF
Description
IC DSPIC MCU/DSP 64K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ64GP206-IPT.pdf
(322 pages)
3.DSPIC33FJ64GP206-IPT.pdf
(28 pages)
Specifications of DSPIC33FJ64GP310T-I/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64GP310T-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24HJ12GP201-ISO PDF datasheet
- DSPIC33FJ64GP206-IPT PDF datasheet #2
- DSPIC33FJ64GP206-IPT PDF datasheet #3
- Current page: 318 of 322
- Download datasheet (5Mb)
dsPIC33FJXXXGPX06/X08/X10
Reset
Reset Sequence.................................................................. 81
Resets ................................................................................. 77
S
Serial Peripheral Interface (SPI) ....................................... 171
Software Simulator (MPLAB SIM)..................................... 254
Software Stack Pointer, Frame Pointer
Special Features of the CPU............................................. 237
SPI Module
Symbols Used in Opcode Descriptions............................. 246
System Control
T
Temperature and Voltage Specifications
Timer1 ............................................................................... 157
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 159
Timing Characteristics
Timing Diagrams
DS70286C-page 316
SPIxSTAT (SPIx Status and Control) ....................... 172
SR (CPU Status) ................................................... 24, 86
T1CON (Timer1 Control)........................................... 158
TSCON (DCI Transmit Slot Control) ......................... 223
TxCON (T2CON, T4CON, T6CON or T8CON Control) ..
TyCON (T3CON, T5CON, T7CON or T9CON Control) ..
UxMODE (UARTx Mode) .......................................... 186
UxSTA (UARTx Status and Control) ......................... 188
Clock Source Selection ............................................... 79
Special Function Register Reset States ..................... 80
Times .......................................................................... 79
CALLL Stack Frame.................................................... 61
SPI1 Register Map ...................................................... 48
SPI2 Register Map ...................................................... 48
Register Map............................................................... 60
AC ............................................................................. 266
CLKO and I/O ........................................................... 269
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0, ASAM
10-bit A/D Conversion (CHPS
12-bit A/D Conversion (ASAM = 0, SSRC = 000) ..... 292
CAN I/O..................................................................... 288
DCI AC-Link Mode .................................................... 287
DCI Multi -Channel, I
External Clock ........................................................... 267
I2Cx Bus Data (Master Mode) .................................. 281
I2Cx Bus Data (Slave Mode) .................................... 283
I2Cx Bus Start/Stop Bits (Master Mode) ................... 281
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 283
162
163
= 0, SSRC = 000).............................................. 294
0, ASAM = 1, SSRC = 111, SAMC =
00001)
........................................................... 295
2
S Modes ................................. 285
= 01, SIMSAM =
Timing Requirements
Timing Specifications
U
UART Module
V
Voltage Regulator (On-Chip) ............................................ 241
W
Watchdog Timer (WDT)............................................ 237, 242
WWW Address ................................................................. 317
WWW, On-Line Support ..................................................... 12
Input Capture (CAPx) ............................................... 274
OC/PWM................................................................... 275
Output Compare (OCx)............................................. 274
Reset, Watchdog Timer, Oscillator Start-up Timer and
SPIx Master Mode (CKE = 0) ................................... 276
SPIx Master Mode (CKE = 1) ................................... 277
SPIx Slave Mode (CKE = 0) ..................................... 278
SPIx Slave Mode (CKE = 1) ..................................... 279
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 272
CLKO and I/O ........................................................... 269
DCI AC-Link Mode............................................ 287, 289
DCI Multi-Channel, I
External Clock........................................................... 267
Input Capture ............................................................ 274
10-bit A/D Conversion Requirements ....................... 296
12-bit A/D Conversion Requirements ....................... 293
CAN I/O Requirements ............................................. 288
I2Cx Bus Data Requirements (Master Mode)........... 282
I2Cx Bus Data Requirements (Slave Mode)............. 284
Output Compare Requirements................................ 274
PLL Clock ................................................................. 268
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
Simple OC/PWM Mode Requirements ..................... 275
SPIx Master Mode (CKE = 0) Requirements............ 276
SPIx Master Mode (CKE = 1) Requirements............ 277
SPIx Slave Mode (CKE = 0) Requirements.............. 278
SPIx Slave Mode (CKE = 1) Requirements.............. 280
Timer1 External Clock Requirements ....................... 272
Timer2, Timer4, Timer6 and Timer8 External Clock Re-
Timer3, Timer5, Timer7 and Timer9 External Clock Re-
UART1 Register Map.................................................. 48
UART2 Register Map.................................................. 48
Programming Considerations ................................... 242
Power-up Timer ................................................ 270
er-up Timer and Brown-out Reset Requirements...
271
quirements........................................................ 273
quirements........................................................ 273
2
S Modes.......................... 286, 289
© 2009 Microchip Technology Inc.
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