PIC16F777-E/P Microchip Technology, PIC16F777-E/P Datasheet - Page 49
PIC16F777-E/P
Manufacturer Part Number
PIC16F777-E/P
Description
IC PIC MCU FLASH 8KX14 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F737-ISP.pdf
(276 pages)
4.PIC16F737-ISP.pdf
(10 pages)
Specifications of PIC16F777-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
I3DBF777 - BOARD DAUGHTER ICEPIC3DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F777-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F737-ISP PDF datasheet #3
- PIC16F737-ISP PDF datasheet #4
- Current page: 49 of 276
- Download datasheet (6Mb)
TABLE 4-4:
2004 Microchip Technology Inc.
LP, XT, HS,
LP, XT, HS,
Note 1:
LP, XT, HS
Current
System
T1OSC,
EC, RC
EC, RC
T1OSC
T1OSC
INTRC,
INTRC
INTRC
Clock
If the new clock source is the INTOSC or INTOSC postscaler, then the IOFS bit will be set 4 ms (approx.)
after the clock change.
FOSC<2:0> = EC
FOSC<2:0> = RC
FOSC<2:0> = LP,
FOSC<2:0> = LP,
FOSC<2:0> = LP,
SCS bits<1:0>
(Due to Reset)
Modified to:
LP, XT, HS
XT or HS
XT or HS
(T1OSC)
CLOCK SWITCHING MODES
(INTRC)
XT, HS
10
01
00
00
00
or
1024 Clocks
1024 Clocks
8 Clocks of
8 Clocks of
8 Clocks of
8 Clocks of
LP, XT, HS
T1OSC
INTRC
Delay
RC
EC
or
+
OSTS
bit
0
0
1
1
1
IOFS
N/A
N/A
N/A
N/A
1
bit
(1)
T1RUN
bit
0
1
0
0
0
LP, XT, HS During the 1024 clocks,
LP, XT, HS When a Reset occurs, there is
Postscaler
INTOSC
INTOSC
System
T1OSC
INTRC
Clock
New
EC
RC
or
or
or
The internal RC oscillator
frequency is dependant upon
the IRCF bits.
T1OSCEN bit must be enabled.
program execution is clocked
from the secondary oscillator
until the primary oscillator
becomes stable.
no clock transition sequence.
Instruction
execution and/or peripheral
operation is suspended unless
Two-Speed Start-up mode is
enabled, after which the INTRC
will act as the system clock
until the Oscillator Start-up
Timer has expired.
PIC16F7X7
Comments
DS30498C-page 47
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