PIC24FJ192GB110-I/PT Microchip Technology, PIC24FJ192GB110-I/PT Datasheet - Page 119
![IC PIC MCU FLASH 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24FJ192GB110-I/PT
Manufacturer Part Number
PIC24FJ192GB110-I/PT
Description
IC PIC MCU FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
4.PIC24FJ192GB108-IPT.pdf
(328 pages)
Specifications of PIC24FJ192GB110-I/PT
Program Memory Type
FLASH
Program Memory Size
192KB (65.5K x 24)
Package / Case
100-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
83
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
84
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ192GB110-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24FJ128GA106-IPT PDF datasheet
- PIC24FJ64GB106-IPT PDF datasheet #2
- PIC24FJ64GB106-IPT PDF datasheet #3
- PIC24FJ192GB108-IPT PDF datasheet #4
- Current page: 119 of 328
- Download datasheet (6Mb)
7.5.1
When
PIC24FJ256GB110 family devices, users must always
observe these rules in configuring the system clock:
• For USB operation, the selected clock source
• The Primary Oscillator/PLL modes are the only
• While the FRCPLL Oscillator mode is available in
• All other oscillator modes are available; however,
© 2008 Microchip Technology Inc.
(EC, HS or XT) must meet the USB clock
tolerance requirements.
oscillator configurations that permit USB opera-
tion. There is no provision to provide a separate
external clock source to the USB module.
these devices, it should never be used for USB
applications. FRCPLL mode is still available when
the application is not using the USB module. How-
ever, the user must always ensure that the FRC
source is configured to provide a frequency of
4 MHz or 8 MHz (RCDIV2:RCDIV0 = 001 or
000), and that the USB PLL prescaler is
configured appropriately.
USB operation is not possible when these modes
are selected. They may still be useful in cases
where other power levels of operation are
desirable and the USB module is not needed (e.g.,
the application is sleeping and waiting for bus
attachment).
using
CONSIDERATIONS FOR USB
OPERATION
the
USB
On-The-Go
module
PIC24FJ256GB110 FAMILY
Preliminary
in
7.6
In addition to the CLKO output (F
certain oscillator modes, the device clock in the
PIC24FJ256GB110 family devices can also be config-
ured to provide a reference clock output signal to a port
pin. This feature is available in all oscillator configura-
tions and allows the user to select a greater range of
clock submultiples to drive external devices in the
application.
This reference clock output is controlled by the
REFOCON register (Register 7-4). Setting the ROEN
bit (REFOCON<15>) makes the clock signal available
on the REFO pin. The RODIV bits (REFOCON<11:8>)
enable the selection of 16 different clock divider
options.
The ROSSLP and ROSEL bits (REFOCON<13:12>)
control the availability of the reference output during
Sleep mode. The ROSEL bit determines if the oscillator
on OSC1 and OSC2, or the current system clock
source, is used for the reference clock output. The
ROSSLP bit determines if the reference source is
available on REFO when the device is in Sleep mode.
To use the reference clock output in Sleep mode, both
the ROSSLP and ROSEL bits must be set. The device
clock must also be configured for one of the primary
modes (EC, HS or XT); otherwise, if the POSCEN bit is
not also set, the oscillator on OSC1 and OSC2 will be
powered down when the device enters Sleep mode.
Clearing the ROSEL bit allows the reference output
frequency to change as the system clock changes
during any clock switches.
Reference Clock Output
OSC
DS39897B-page 117
/2) available in
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