AT89C51IC2-RLRUM Atmel, AT89C51IC2-RLRUM Datasheet - Page 13

IC 8051 MCU 32K FLASH 44-VQFP

AT89C51IC2-RLRUM

Manufacturer Part Number
AT89C51IC2-RLRUM
Description
IC 8051 MCU 32K FLASH 44-VQFP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51IC2-RLRUM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Interface Type
UART, SPI, TWI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
AT89C51IC2-RLRUMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51IC2-RLRUM
Manufacturer:
Atmel
Quantity:
10 000
Table 13. Pin Description for 40/44 Pin Packages (Continued)
4301D–8051–02/08
RST
ALE/PROG
PSEN
EA
Mnemonic
PLCC44
10
33
32
35
Pin Number
VQFP44 1.4
27
26
29
4
Type
O (I)
I/O
O
I
Name and Function
SDA is the bidirectional 2-wire data line
Reset: A high on this pin for two machine cycles while the oscillator is running, resets
the device. An internal diffused resistor to V
external capacitor to V
system reset.
Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 (1/3 in X2 mode) the oscillator frequency, and can be used for
external timing or clocking. Note that one ALE pulse is skipped during each access to
external data memory. This pin is also the program pulse input (PROG) during Flash
programming. ALE can be disabled by setting SFR’s AUXR.0 bit. With this bit set, ALE
will be inactive during internal fetches.
Program Strobe ENable: The read strobe to external program memory. When execut-
ing code from the external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during each access to external
data memory. PSEN is not activated during fetches from internal program memory.
External Access Enable: EA must be externally held low to enable the device to fetch
code from external program memory locations 0000H to FFFFH (RD). If security level 1
is programmed, EA will be internally latched on Reset.
CC
. This pin is an output when the hardware watchdog forces a
SS
permits a power-on reset using only an
13

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