PIC18LF6490-I/PT Microchip Technology, PIC18LF6490-I/PT Datasheet - Page 98

IC PIC MCU FLASH 8KX16 64TQFP

PIC18LF6490-I/PT

Manufacturer Part Number
PIC18LF6490-I/PT
Description
IC PIC MCU FLASH 8KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF6490-I/PT

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
50
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI/I2C/EUSART/AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
50
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183028
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF6490-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6390/6490/8390/8490
REGISTER 8-2:
DS39629C-page 96
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note:
R/W-1
RBPU
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding
enable bit or the global interrupt enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG3: External Interrupt 3 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
INT3IP: INT3 External Interrupt Priority bit
1 = High priority
0 = Low priority
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
INTEDG0
R/W-1
INTCON2: INTERRUPT CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
INTEDG1
R/W-1
INTEDG2
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INTEDG3
R/W-1
TMR0IP
R/W-1
© 2007 Microchip Technology Inc.
x = Bit is unknown
INT3IP
R/W-1
R/W-1
RBIP
bit 0

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