PIC18LF4455-I/PT Microchip Technology, PIC18LF4455-I/PT Datasheet - Page 28

• Manufacturer Part Number: PIC18LF4455-I/PT
• Description: IC PIC MCU FLASH 12KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4455-I/PT

• Core Size: 8-Bit
• Program Memory Size: 24KB (12K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 2048Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, I2C, EAUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2455/2550/4455/4550
FIGURE 2-3:
2.2.3
The EC, ECIO, ECPLL and ECPIO Oscillator modes
require an external clock source to be connected to the
OSC1 pin. There is no oscillator start-up time required
after a Power-on Reset or after an exit from Sleep
mode.
In the EC and ECPLL Oscillator modes, the oscillator
frequency divided by 4 is available on the OSC2 pin.
This signal may be used for test purposes or to
synchronize other logic. Figure 2-4 shows the pin
connections for the EC Oscillator mode.
FIGURE 2-4:
The ECIO and ECPIO Oscillator modes function like the
EC and ECPLL modes, except that the OSC2 pin
becomes an additional general purpose I/O pin. The I/O
pin becomes bit 6 of PORTA (RA6). Figure 2-5 shows
the pin connections for the ECIO Oscillator mode.
FIGURE 2-5:
The internal postscaler for reducing clock frequency in
XT and HS modes is also available in EC and ECIO
modes.
DS39632D-page 26
Clock from
Ext. System
Clock from
Ext. System
Clock from
Ext. System
EXTERNAL CLOCK INPUT
F
Open
OSC
RA6
/4
EXTERNAL CLOCK INPUT
OPERATION (HS OSC
CONFIGURATION)
EXTERNAL CLOCK
INPUT OPERATION
(EC AND ECPLL
CONFIGURATION)
EXTERNAL CLOCK
INPUT OPERATION
(ECIO AND ECPIO
CONFIGURATION)
OSC1
OSC2
OSC1/CLKI
OSC2/CLKO
OSC1/CLKI
I/O (OSC2)
PIC18FXXXX
PIC18FXXXX
PIC18FXXXX
(HS Mode)
Preliminary
2.2.4
PIC18F2455/2550/4255/4550 devices include a Phase
Locked Loop (PLL) circuit. This is provided specifically
for USB applications with lower speed oscillators and
can also be used as a microcontroller clock source.
The PLL is enabled in HSPLL, XTPLL, ECPLL and
ECPIO Oscillator modes. It is designed to produce a
fixed 96 MHz reference clock from a fixed 4 MHz input.
The output can then be divided and used for both the
USB and the microcontroller core clock. Because the
PLL has a fixed frequency input and output, there are
eight prescaling options to match the oscillator input
frequency to the PLL.
There is also a separate postscaler option for deriving
the microcontroller clock from the PLL. This allows the
USB peripheral and microcontroller to use the same
oscillator input and still operate at different clock
speeds. In contrast to the postscaler for XT, HS and EC
modes, the available options are 1/2, 1/3, 1/4 and 1/6
of the PLL output.
The HSPLL, ECPLL and ECPIO modes make use of
the HS mode oscillator for frequencies up to 48 MHz.
The prescaler divides the oscillator input by up to 12 to
produce the 4 MHz drive for the PLL. The XTPLL mode
can only use an input frequency of 4 MHz which drives
the PLL directly.
FIGURE 2-6:
HS/EC/ECIO/XT Oscillator Enable
OSC2
OSC1
(from CONFIG1H Register)
Oscillator
Prescaler
PLL FREQUENCY MULTIPLIER
and
F
F
PLL Enable
÷24
IN
OUT
PLL BLOCK DIAGRAM
(HS MODE)
© 2007 Microchip Technology Inc.
Comparator
Phase
Loop
Filter
VCO
SYSCLK