DSPIC30F4012-30I/SP Microchip Technology, DSPIC30F4012-30I/SP Datasheet - Page 56

• Manufacturer Part Number: DSPIC30F4012-30I/SP
• Description: IC DSPIC MCU/DSP 48K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4012-30I/SP

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 20
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401230ISP

dsPIC30F4011/4012
7.2
7.2.1
In order to erase a block of data EEPROM, the
NVMADRU and NVMADR registers must initially
point to the block of memory to be erased. Configure
NVMCON for erasing a block of data EEPROM and
set the WR and WREN bits in the NVMCON register.
Setting the WR bit initiates the erase, as shown in
Example
EXAMPLE 7-2:
7.2.2
The TBLPAG and NVMADR registers must point to
the block. Select erase a block of data Flash and set
the WR and WREN bits in the NVMCON register.
Setting the WR bit initiates the erase, as shown in
Example
EXAMPLE 7-3:
DS70135G-page 56
; Select data EEPROM block, WR, WREN bits
; Start erase cycle by setting WR after writing key sequence
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
; Select data EEPROM word, WR, WREN bits
; Start erase cycle by setting WR after writing key sequence
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
NOP
NOP
Erasing Data EEPROM
7-2.
7-3.
ERASING A BLOCK OF DATA
EEPROM
ERASING A WORD OF DATA
EEPROM
#0x4045,W0
W0
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
#0x4044,W0
W0
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
,
,
,
,
,
,
NVMCON
NVMKEY
NVMKEY
NVMCON
NVMKEY
NVMKEY
DATA EEPROM BLOCK ERASE
DATA EEPROM WORD ERASE
;
; Write the 0x55 key
;
; Write the 0xAA key
; Initiate erase sequence
; Initialize NVMCON SFR
; Block all interrupts with priority < 7
; for next 5 instructions
;
; Write the 0x55 key
;
; Write the 0xAA key
; Initiate erase sequence
; Block all interrupts with priority <7
; for next 5 instructions
© 2010 Microchip Technology Inc.