PIC16LF871-I/PT Microchip Technology, PIC16LF871-I/PT Datasheet - Page 31

• Manufacturer Part Number: PIC16LF871-I/PT
• Description: IC PIC MCU FLASH 2KX14 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF871-I/PT

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC16LF
• No. Of I/o's: 33
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: PSP, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 28 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

3.3
Reading EEPROM data memory only requires that the
desired address to access be written to the EEADR
register and clear the EEPGD bit. After the RD bit is set,
data will be available in the EEDATA register on the
very next instruction cycle. EEDATA will hold this value
until another read operation is initiated or until it is
written by firmware.
The steps to reading the EEPROM data memory are:
1.
2.
3.
4.
EXAMPLE 3-1:
3.4
There are many steps in writing to the EEPROM data
memory. Both address and data values must be written
to the SFRs. The EEPGD bit must be cleared, and the
WREN bit must be set, to enable writes. The WREN bit
should be kept clear at all times, except when writing to
the EEPROM data. The WR bit can only be set if the
WREN bit was set in a previous operation (i.e., they
both cannot be set in the same operation). The WREN
bit should then be cleared by firmware after the write.
Clearing the WREN bit before the write actually
completes will not terminate the write in progress.
Writes to EEPROM data memory must also be pref-
aced with a special sequence of instructions that pre-
vent inadvertent write operations. This is a sequence of
five instructions that must be executed without interrup-
tions. The firmware should verify that a write is not in
progress before starting another cycle.
 2003 Microchip Technology Inc.
BSF
BCF
MOVF
MOVWF
BSF
BCF
BSF
BCF
MOVF
Write the address to EEDATA. Make sure that
the address is not larger than the memory size
of the PIC16F870/871 devices.
Clear the EEPGD bit to point to EEPROM data
memory.
Set the RD bit to start the read operation.
Read the data from the EEDATA register.
Reading the EEPROM Data
Memory
Writing to the EEPROM Data
Memory
STATUS, RP1
STATUS, RP0
ADDR, W
EEADR
STATUS, RP0
EECON1, EEPGD
EECON1, RD
STATUS, RP0
EEDATA, W
EEPROM DATA READ
;
;Bank 2
;Write address
;to read from
;Bank 3
;Point to Data memory
;Start read operation
;Bank 2
;W = EEDATA
The steps to write to EEPROM data memory are:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. At the completion of the write cycle, the WR bit
EXAMPLE 3-2:
BSF
BSF
BTFSC EECON1, WR
GOTO $-1
BCF
MOVF ADDR, W
MOVWF EEADR
MOVF VALUE, W
MOVWF EEDATA
BSF
BCF
BSF
BCF
MOVLW 0x55
MOVWF EECON2
MOVLW 0xAA
MOVWF EECON2
BSF
BSF
BCF
If step 10 is not implemented, check the WR bit
to see if a write is in progress.
Write the address to EEADR. Make sure that the
address is not larger than the memory size of
the PIC16F870/871 devices.
Write the 8-bit data value to be programmed in
the EEDATA register.
Clear the EEPGD bit to point to EEPROM data
memory.
Set the WREN bit to enable program operations.
Disable interrupts (if enabled).
Execute the special five instruction sequence:
• Write 55h to EECON2 in two steps (first to W,
• Write AAh to EECON2 in two steps (first to
• Set the WR bit
Enable interrupts (if using interrupts).
Clear the WREN bit to disable program
operations.
is cleared and the EEIF interrupt flag bit is set.
(EEIF must be cleared by firmware.) If step 1 is
not implemented, then firmware should check
for EEIF to be set, or WR to clear, to indicate the
end of the program cycle.
then to EECON2)
W, then to EECON2)
STATUS, RP1
STATUS, RP0
STATUS, RP0
STATUS, RP0
EECON1, EEPGD ;Point to Data memory
EECON1, WREN ;Enable writes
INTCON, GIE
EECON1, WR
INTCON, GIE
EECON1, WREN ;Disable writes
PIC16F870/871
EEPROM DATA WRITE
;
;Bank 3
;Wait for
;write to finish
;Bank 2
;Address to
;write to
;Data to
;write
;Bank 3
;Only disable interrupts
;if already enabled,
;otherwise discard
;Write 55h to
;EECON2
;Write AAh to
;EECON2
;Start write operation
;Only enable interrupts
;if using interrupts,
;otherwise discard
DS30569B-page 29