PIC18F452-E/P Microchip Technology, PIC18F452-E/P Datasheet - Page 3
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PIC18F452-E/P
Manufacturer Part Number
PIC18F452-E/P
Description
IC MCU CMOS 40MHZ 16K FLSH 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
8.PIC18F452-EP.pdf
(332 pages)
Specifications of PIC18F452-E/P
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F452-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
2.3
The code memory space extends from 0000h to 7FFFh
(32 Kbytes) in four, 8-Kbyte panels. Addresses 0000h
through 01FFh, however, define a “Boot Block” region
that is treated separately from Panel 1. All code
memory is on-chip.
In addition to the code memory space, there are three
blocks in the configuration and ID space that are acces-
sible to the user through Table Reads and Table Writes.
Their locations in the memory map are shown in
Figure 2-3.
FIGURE 2-2:
2010 Microchip Technology Inc.
Unimplemented
Unimplemented
Unimplemented
Memory Map
(PIC18FX42)
Boot Block
16 Kbytes
Read ‘0’s
Read ‘0’s
Read ‘0’s
Block 0
Block 1
MEMORY SIZE / DEVICE
CODE MEMORY SPACE FOR PIC18FXX2/XX8 DEVICES
Unimplemented
(PIC18FX52)
32 Kbytes
Boot Block
Read ‘0’s
Block 0
Block 1
Block 2
Block 3
000000h
0001FFh
000200h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
008000h
1FFFFFh
Address
Range
TABLE 2-2:
PIC18F242
PIC18F248
PIC18F252
PIC18F258
PIC18F442
PIC18F448
PIC18F452
PIC18F458
(Unimplemented Memory Space)
Device
Block Code Protection
PIC18FXX2/XX8
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
CP2, WRT2, EBTR2
CP3, WRT3, EBTR3
Controlled By:
IMPLEMENTATION OF CODE
MEMORY
0000h - 3FFFh (16K)
0000h - 7FFFh (32K)
0000h - 3FFFh (16K)
0000h - 7FFFh (32K)
Code Memory Size
(Bytes)
DS39576C-page 3