ATMEGA64L-8MQR Atmel, ATMEGA64L-8MQR Datasheet - Page 79
ATMEGA64L-8MQR
Manufacturer Part Number
ATMEGA64L-8MQR
Description
MCU AVR 64KB FLASH 8MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64L-8MQR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ATmega64(L)
• INT3/TXD1 – Port D, Bit 3
INT3, External Interrupt Source 3: The PD3 pin can serve as an External Interrupt source to the
MCU.
TXD1, Transmit Data (Data output pin for the USART1). When the USART1 transmitter is
enabled, this pin is configured as an output regardless of the value of DDD3.
• INT2/RXD1 – Port D, Bit 2
INT2, External Interrupt source 2. The PD2 pin can serve as an External Interrupt source to the
MCU.
RXD1, Receive Data (Data input pin for the USART1). When the USART1 receiver is enabled
this pin is configured as an input regardless of the value of DDD2. When the USART forces this
pin to be an input, the pull-up can still be controlled by the PORTD2 bit.
• INT1/SDA – Port D, Bit 1
INT1, External Interrupt Source 1. The PD1 pin can serve as an External Interrupt source to the
MCU.
SDA, Two-wire Serial Interface Data: When the TWEN bit in TWCR is set (one) to enable the
Two-wire Serial Interface, pin PD1 is disconnected from the port and becomes the serial data I/O
pin for the Two-wire Serial Interface. In this mode, there is a spike filter on the pin to suppress
spikes shorter than 50 ns on the input signal, and the pin is driven by an open drain driver with
slew-rate limitation.
• INT0/SCL – Port D, Bit 0
INT0, External Interrupt Source 0. The PD0 pin can serve as an External Interrupt source to the
MCU.
SCL, Two-wire Serial Interface Clock: When the TWEN bit in TWCR is set (one) to enable the
Two-wire Serial Interface, pin PD0 is disconnected from the port and becomes the serial clock
I/O pin for the Two-wire Serial Interface. In this mode, there is a spike filter on the pin to sup-
press spikes shorter than 50 ns on the input signal, and the pin is driven by an open drain driver
with slew-rate limitation.
Table 37
and
Table 38
relates the alternate functions of Port D to the overriding signals shown in
Figure 33 on page
71.
79
2490Q–AVR–06/10
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