PIC16LF873-04I/SO Microchip Technology, PIC16LF873-04I/SO Datasheet - Page 97
![IC MCU FLASH 4KX14 EE A/D 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC16LF873-04I/SO
Manufacturer Part Number
PIC16LF873-04I/SO
Description
IC MCU FLASH 4KX14 EE A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F873-04SO.pdf
(218 pages)
Specifications of PIC16LF873-04I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF873-04I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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10.0
The Universal Synchronous Asynchronous Receiver
Transmitter (USART) module is one of the two serial
I/O modules. (USART is also known as a Serial Com-
munications Interface or SCI.) The USART can be con-
figured as a full duplex asynchronous system that can
communicate with peripheral devices such as CRT ter-
minals and personal computers, or it can be configured
as a half duplex synchronous system that can commu-
nicate with peripheral devices such as A/D or D/A inte-
grated circuits, serial EEPROMs etc.
REGISTER 10-1:
2001 Microchip Technology Inc.
ADDRESSABLE UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (USART)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER (ADDRESS 98h)
CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care
Synchronous mode:
1 = Master mode (clock generated internally from BRG)
0 = Slave mode (clock from external source)
TX9: 9-bit Transmit Enable bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
1 = Transmit enabled
0 = Transmit disabled
Note: SREN/CREN overrides TXEN in SYNC mode.
1 = Synchronous mode
0 = Asynchronous mode
Unimplemented: Read as '0'
BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
TX9D: 9th bit of Transmit Data, can be parity bit
bit 7
Legend:
R = Readable bit
- n = Value at POR
TXEN: Transmit Enable bit
SYNC: USART Mode Select bit
CSRC
R/W-0
R/W-0
TX9
R/W-0
TXEN
W = Writable bit
’1’ = Bit is set
R/W-0
SYNC
The USART can be configured in the following modes:
• Asynchronous (full duplex)
• Synchronous - Master (half duplex)
• Synchronous - Slave (half duplex)
Bit SPEN (RCSTA<7>) and bits TRISC<7:6> have to
be set in order to configure pins RC6/TX/CK and
RC7/RX/DT as the Universal Synchronous Asynchro-
nous Receiver Transmitter.
The USART module also has a multi-processor com-
munication capability using 9-bit address detection.
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
—
R/W-0
BRGH
PIC16F87X
x = Bit is unknown
TRMT
R-1
DS30292C-page 95
R/W-0
TX9D
bit 0
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