PIC16C73A-20E/SP Microchip Technology, PIC16C73A-20E/SP Datasheet - Page 21
![IC MCU OTP 4KX14 A/D PWM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16C73A-20E/SP
Manufacturer Part Number
PIC16C73A-20E/SP
Description
IC MCU OTP 4KX14 A/D PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C73A-20SP.pdf
(8 pages)
Specifications of PIC16C73A-20E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C72-04SO PDF datasheet #3
- PIC16C73A-20SP PDF datasheet #4
- Current page: 21 of 289
- Download datasheet (3Mb)
FIGURE 4-4:
1997 Microchip Technology Inc.
Note 1: Not a physical register.
Address
File
0Ch
0Dh
1Ch
1Dh
0Ah
0Bh
0Eh
0Fh
1Ah
1Bh
1Eh
1Fh
7Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
12h
13h
14h
15h
16h
17h
18h
19h
20h
11h
'0'.
Unimplemented data memory locations, read as
CCP1CON
SSPCON
CCPR1H
ADCON0
SSPBUF
CCPR1L
PCLATH
INTCON
STATUS
PORTB
PORTC
TMR1H
ADRES
INDF
PORTA
TMR1L
T1CON
T2CON
Bank 0
TMR0
TMR2
PIR1
Purpose
Register
General
PCL
FSR
PIC16C72 REGISTER FILE
MAP
(1)
SSPSTAT
ADCON1
SSPADD
Purpose
Register
OPTION
STATUS
PCLATH
INTCON
General
INDF
Bank 1
TRISC
TRISA
TRISB
PCON
PIE1
PCL
FSR
PR2
(1)
Address
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
BFh
C0h
FFh
File
FIGURE 4-5:
Note 1: Not a physical register.
Address
0Ch
0Dh
1Ch
1Dh
0Ah
0Bh
0Eh
1Ah
1Bh
1Eh
0Fh
1Fh
7Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
12h
13h
14h
15h
16h
17h
18h
19h
20h
11h
File
2: These registers are not physically imple-
'0'.
Unimplemented data memory locations, read as
mented on the PIC16C73/73A, read as '0'.
CCP1CON
CCP2CON
PORTD
PORTE
SSPCON
ADCON0
CCPR1H
CCPR2H
PCLATH
SSPBUF
CCPR1L
CCPR2L
STATUS
INTCON
RCREG
PORTC
PORTA
PORTB
TMR1H
T1CON
T2CON
TXREG
ADRES
INDF
TMR1L
RCSTA
Purpose
Register
Bank 0
General
TMR0
TMR2
PIR1
PIR2
FSR
PCL
PIC16C73/73A/74/74A
REGISTER FILE MAP
(1)
(2)
(2)
PIC16C7X
SSPSTAT
ADCON1
SSPADD
TRISD
TRISE
PCLATH
OPTION
STATUS
INTCON
SPBRG
Purpose
Register
Bank 1
INDF
General
TXSTA
TRISA
TRISB
TRISC
PCON
PIE1
PIE2
FSR
PCL
PR2
DS30390E-page 21
(1)
(2)
(2)
Address
File
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
FFh
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