DSPIC30F4011-20I/ML Microchip Technology, DSPIC30F4011-20I/ML Datasheet - Page 5
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DSPIC30F4011-20I/ML
Manufacturer Part Number
DSPIC30F4011-20I/ML
Description
IC DSPIC MCU/DSP 48K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F4012-30ISO.pdf
(238 pages)
2.DSPIC30F4012-30ISO.pdf
(18 pages)
3.DSPIC30F4012-30ISO.pdf
(6 pages)
4.DSPIC30F4012-30ISO.pdf
(16 pages)
5.DSPIC30F4012-30ISO.pdf
(22 pages)
6.DSPIC30F4011-20IML.pdf
(236 pages)
Specifications of DSPIC30F4011-20I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
48KB
Supply Voltage Range
2.5V To 5.5V
Operating Temperature Range
-40°C To
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F401120/ML
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F4011-20I/ML
Manufacturer:
Microchip Technology
Quantity:
135
5. Module: Early Termination of Nested DO
EXAMPLE 4:
© 2008 Microchip Technology Inc.
LOOP1: MOV
LOOP0: MOV
Note:
When using two DO loops in a nested fashion,
terminating the inner-level DO loop by setting the
EDT (CORCON<11>) bit will produce unexpected
results. Specifically, the device may continue
executing code within the outer DO loop forever.
This erratum does not affect the operation of the
MPLAB C30 compiler.
Work around
The application should save the DCOUNT SFR
prior to entering the inner DO loop and restore it
upon exiting the inner DO loop. This work around is
shown in Example 4.
.include “p30fxxxx.inc”
.......
DO
....
PUSH DCOUNT
DO
....
BTSS Flag, #0
BSET CORCON, #EDT
....
....
POP
...
For details on the functionality of
EDT bit, see section 2.9.2.4
in the dsPIC30F Family Reference
Manual.
#CNT1, LOOP0
#CNT2, LOOP1
W1, W5
DCOUNT
W5, W8
Loops
SAVE AND RESTORE
DCOUNT
;Outer loop start
;Save DCOUNT
;Inner loop
;starts
;Terminate inner
;DO-loop early
;Inner loop ends
;Restore DCOUNT
;Outer loop ends
6. Module: 4x PLL Operation
dsPIC30F4011/4012
When the 4x PLL mode of operation is selected,
the specified input frequency range of 4-10 MHz is
not fully supported.
When device V
frequency must be in the range of 4-5 MHz. When
device V
must be in the range of 4-6 MHz for both industrial
and extended temperature ranges.
Work around
1. Use 8x PLL or 16x PLL mode of operation and
2. Use the EC without PLL Clock mode with a
set final device clock speed using the
POST<1:0> oscillator postscaler control bits
(OSCCON<7:6>).
suitable clock frequency to obtain the equivalent
4x PLL clock rate.
DD
is 3.0-3.6V, the 4x PLL input frequency
DD
is 2.5-3.0V, the 4x PLL input
DS80398A-page 5