AT91SAM7X128B-CU-999 Atmel, AT91SAM7X128B-CU-999 Datasheet - Page 44

IC MCU ARM 128KB FLASH 100TFBGA

AT91SAM7X128B-CU-999

Manufacturer Part Number
AT91SAM7X128B-CU-999
Description
IC MCU ARM 128KB FLASH 100TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7X128B-CU-999

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, I2S, JTAG, UASRT
Maximum Clock Frequency
55 MHz
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7X128B-CU-999
Manufacturer:
Atmel
Quantity:
10 000
Table 12-2.
44
Doc. Rev
6120ES
6120FS
AT91SAM7X512/256/128 Preliminary
Revision History
Comments
“Features”
Section 10.8 ”Two-wire
Section 7.4 ”Peripheral DMA
Section 10.11 ”Timer
Section 10.15 ”Analog-to-Digital
Section 6.1 ”JTAG Port Pins”, Section 6.2 ”Test Pin”
Section 8.4.3 ”Internal Flash”,
before the Remap Command.”
Figure 9-1,”System Controller Block Diagram”,
”Features”,
Communication”
Section 12. ”Ordering
Table 3-1, “Signal Description List”
,TWI updated to include Atmel TWI compatibility with I2C Standard.
”Debug Unit
Counter”, The TC has Two output compare or one input capture per channel.
Information”, MLR B parts added to ordering information.
Interface”, updated.
(DBGU)”, added
Controller”, added PDC priority list.
updated: “At any time, the Flash is mapped ... if GPNVM bit 2 is set and
Converter”, INL and DNL updated.
footnote added to JTAGSEL, ERASE and TST pin comments.
”Mode for General Purpose 2-wire UART Serial
RTT is reset by power_on_reset.
and
Section 6.4 ”ERASE Pin”,
updated.
6120FS–ATARM–17-Feb-09
Change
Request
Ref.
4247
4774
4210
4007
5064
5850
5223
5846
6064

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